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Highly Bendable In-Ga-ZnO Thin Film Transistors by Using a Thermally Stable Organic Dielectric Layer

View Article: PubMed Central - PubMed

ABSTRACT

Flexible In-Ga-ZnO (IGZO) thin film transistor (TFT) on a polyimide substrate is produced by employing a thermally stable SA7 organic material as the multi-functional barrier and dielectric layers. The IGZO channel layer was sputtered at Ar:O2 gas flow rate of 100:1 sccm and the fabricated TFT exhibited excellent transistor performances with a mobility of 15.67 cm2/Vs, a threshold voltage of 6.4 V and an on/off current ratio of 4.5 × 105. Further, high mechanical stability was achieved by the use of organic/inorganic stacking of dielectric and channel layers. Thus, the IGZO transistor endured unprecedented bending strain up to 3.33% at a bending radius of 1.5 mm with no significant degradation in transistor performances along with a superior reliability up to 1000 cycles.

No MeSH data available.


A plot of ID1/2 [A]1/2 vs. VG[V] measured at certain time intervals up to 5000 sec for the positive bias stress test at VGS = +40 V, which was applied to the IGZO TFTs fabricated at (a) OPP1, (b) OPP2 and (c) OPP3.
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f4: A plot of ID1/2 [A]1/2 vs. VG[V] measured at certain time intervals up to 5000 sec for the positive bias stress test at VGS = +40 V, which was applied to the IGZO TFTs fabricated at (a) OPP1, (b) OPP2 and (c) OPP3.

Mentions: To analyze the interface quality between the IGZO channel and the SA7 dielectric layer, a positive bias stress (PBS) measurement was performed. With increasing the PBS time, more major charge carriers are likely to be trapped at the channel/dielectric interface, resulting in a higher threshold voltage shift262736. When a certain positive gate bias is applied continuously, the free electrons within the active layer are attracted toward the channel/gate dielectric interface. Then, the defect sites at the low energy level and the deep energy level can trap the free electrons during the PBS. The electrons trapped at the low energy level can be released back to the channel easily in the following voltage sweep. However, the electrons trapped at the deep energy level cannot be released immediately, which reduces the electron carrier concentration within the channel and varies the transistor characteristics. The PBS was conducted with three different IGZO transistors (OPP1, OPP2 and OPP3) by applying a gate bias of +40 V for 5000 sec, and subsequently, the transfer characteristics were measured at different time intervals, as shown in Fig. 4. For all samples, the threshold voltage shifted towards positive as the PBS time increased. Before applying the PBS, the free electrons in the channel were not trapped, and therefore, a channel could be formed immediately under a low threshold voltage. However, as the PBS time increased, more free electrons were trapped to the deep energy level at the interface, and those charges were not released to the channel immediately in the following bias sweeping. Therefore, the net carrier concentration of the channel decreased, resulting in a positive shift of the threshold voltage.


Highly Bendable In-Ga-ZnO Thin Film Transistors by Using a Thermally Stable Organic Dielectric Layer
A plot of ID1/2 [A]1/2 vs. VG[V] measured at certain time intervals up to 5000 sec for the positive bias stress test at VGS = +40 V, which was applied to the IGZO TFTs fabricated at (a) OPP1, (b) OPP2 and (c) OPP3.
© Copyright Policy - open-access
Related In: Results  -  Collection

License
Show All Figures
getmorefigures.php?uid=PMC5120347&req=5

f4: A plot of ID1/2 [A]1/2 vs. VG[V] measured at certain time intervals up to 5000 sec for the positive bias stress test at VGS = +40 V, which was applied to the IGZO TFTs fabricated at (a) OPP1, (b) OPP2 and (c) OPP3.
Mentions: To analyze the interface quality between the IGZO channel and the SA7 dielectric layer, a positive bias stress (PBS) measurement was performed. With increasing the PBS time, more major charge carriers are likely to be trapped at the channel/dielectric interface, resulting in a higher threshold voltage shift262736. When a certain positive gate bias is applied continuously, the free electrons within the active layer are attracted toward the channel/gate dielectric interface. Then, the defect sites at the low energy level and the deep energy level can trap the free electrons during the PBS. The electrons trapped at the low energy level can be released back to the channel easily in the following voltage sweep. However, the electrons trapped at the deep energy level cannot be released immediately, which reduces the electron carrier concentration within the channel and varies the transistor characteristics. The PBS was conducted with three different IGZO transistors (OPP1, OPP2 and OPP3) by applying a gate bias of +40 V for 5000 sec, and subsequently, the transfer characteristics were measured at different time intervals, as shown in Fig. 4. For all samples, the threshold voltage shifted towards positive as the PBS time increased. Before applying the PBS, the free electrons in the channel were not trapped, and therefore, a channel could be formed immediately under a low threshold voltage. However, as the PBS time increased, more free electrons were trapped to the deep energy level at the interface, and those charges were not released to the channel immediately in the following bias sweeping. Therefore, the net carrier concentration of the channel decreased, resulting in a positive shift of the threshold voltage.

View Article: PubMed Central - PubMed

ABSTRACT

Flexible In-Ga-ZnO (IGZO) thin film transistor (TFT) on a polyimide substrate is produced by employing a thermally stable SA7 organic material as the multi-functional barrier and dielectric layers. The IGZO channel layer was sputtered at Ar:O2 gas flow rate of 100:1 sccm and the fabricated TFT exhibited excellent transistor performances with a mobility of 15.67 cm2/Vs, a threshold voltage of 6.4 V and an on/off current ratio of 4.5 × 105. Further, high mechanical stability was achieved by the use of organic/inorganic stacking of dielectric and channel layers. Thus, the IGZO transistor endured unprecedented bending strain up to 3.33% at a bending radius of 1.5 mm with no significant degradation in transistor performances along with a superior reliability up to 1000 cycles.

No MeSH data available.