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Efficient BinDCT hardware architecture exploration and implementation on FPGA

View Article: PubMed Central - PubMed

ABSTRACT

This paper presents a hardware module design for the forward Binary Discrete Cosine Transform (BinDCT) and its implementation on a field programmable gate array device. Different architectures of the BinDCT module were explored to ensure the maximum efficiency. The elaboration of these architectures included architectural design, timing and pipeline analysis, hardware description language modeling, design synthesis, and implementation. The developed BinDCT hardware module presents a high efficiency in terms of operating frequency and hardware resources, which has made it suitable for the most recent video standards with high image resolution and refresh frequency. Additionally, the high hardware efficiency of the BinDCT would make it a very good candidate for time and resource-constrained applications. By comparison with several recent implementations of discrete cosine transform approximations, it has been shown that the proposed hardware BinDCT module presents the best performances.

No MeSH data available.


Dependency graph.
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f0020: Dependency graph.

Mentions: The data dependency can be considered by exploring the dependency graph represented in Fig. 4. As shown in this figure, the coefficients a5 and a6 have to be calculated in priority, since any delay on the calculation of Z0 and then on the calculation of H will introduce additional cycles on the calculation of the Y7 and Y1 outputs. Y5 presents a mobility of two cycles; i.e., it can be calculated two cycles after d1 and d2. As y3 depends on y5 and d2, it has the same mobility as y5. d1 and d2 depend respectively on a4 and z2 and z1 and a7. a4 and a7 can be then calculated 4 cycles after a5 and a6, as they can only be used from the fifth cycle after Z0. The priority order for the left side of the dependency graph (corresponding to a0, a1 a2 a3 entries) can be determined utilizing the same principle.


Efficient BinDCT hardware architecture exploration and implementation on FPGA
Dependency graph.
© Copyright Policy - CC BY-NC-ND
Related In: Results  -  Collection

License
Show All Figures
getmorefigures.php?uid=PMC5037209&req=5

f0020: Dependency graph.
Mentions: The data dependency can be considered by exploring the dependency graph represented in Fig. 4. As shown in this figure, the coefficients a5 and a6 have to be calculated in priority, since any delay on the calculation of Z0 and then on the calculation of H will introduce additional cycles on the calculation of the Y7 and Y1 outputs. Y5 presents a mobility of two cycles; i.e., it can be calculated two cycles after d1 and d2. As y3 depends on y5 and d2, it has the same mobility as y5. d1 and d2 depend respectively on a4 and z2 and z1 and a7. a4 and a7 can be then calculated 4 cycles after a5 and a6, as they can only be used from the fifth cycle after Z0. The priority order for the left side of the dependency graph (corresponding to a0, a1 a2 a3 entries) can be determined utilizing the same principle.

View Article: PubMed Central - PubMed

ABSTRACT

This paper presents a hardware module design for the forward Binary Discrete Cosine Transform (BinDCT) and its implementation on a field programmable gate array device. Different architectures of the BinDCT module were explored to ensure the maximum efficiency. The elaboration of these architectures included architectural design, timing and pipeline analysis, hardware description language modeling, design synthesis, and implementation. The developed BinDCT hardware module presents a high efficiency in terms of operating frequency and hardware resources, which has made it suitable for the most recent video standards with high image resolution and refresh frequency. Additionally, the high hardware efficiency of the BinDCT would make it a very good candidate for time and resource-constrained applications. By comparison with several recent implementations of discrete cosine transform approximations, it has been shown that the proposed hardware BinDCT module presents the best performances.

No MeSH data available.