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Plasmonic-multimode-interference-based logic circuit with simple phase adjustment.

Ota M, Sumimura A, Fukuhara M, Ishii Y, Fukuda M - Sci Rep (2016)

Bottom Line: Also, simultaneous operations of XOR and AND gates are substantiated experimentally by combining 1 × 1 MMI based phase adjusters and 2 × 2 MMI based intensity modulators.An experimental on-off ratio of at least 4.3 dB is confirmed using scanning near-field optical microscopy.The proposed structure will contribute to high-density plasmonic circuits, fabricated by complementary MOS-compatible process or printing techniques.

View Article: PubMed Central - PubMed

Affiliation: Department of Electrical and Electronic Information Engineering, Toyohashi University of Technology, 1-1 Hibarigaoka, Tempaku-cho, Toyohashi-shi, Aichi 441-8580, Japan.

ABSTRACT
All-optical logic circuits using surface plasmon polaritons have a potential for high-speed information processing with high-density integration beyond the diffraction limit of propagating light. However, a number of logic gates that can be cascaded is limited by complicated signal phase adjustment. In this study, we demonstrate a half-adder operation with simple phase adjustment using plasmonic multimode interference (MMI) devices, composed of dielectric stripes on a metal film, which can be fabricated by a complementary metal-oxide semiconductor (MOS)-compatible process. Also, simultaneous operations of XOR and AND gates are substantiated experimentally by combining 1 × 1 MMI based phase adjusters and 2 × 2 MMI based intensity modulators. An experimental on-off ratio of at least 4.3 dB is confirmed using scanning near-field optical microscopy. The proposed structure will contribute to high-density plasmonic circuits, fabricated by complementary MOS-compatible process or printing techniques.

No MeSH data available.


Plasmonic logic circuit using the MMI structure.(a) Schematic illustration of an MMI-based plasmonic half adder, composed of 1 × 1 MMI phase adjusters and 2 × 2 MMI intensity modulators. Radiation output, which suppresses radiation loss caused by opposite phase interference in the case of single-mode-waveguide-based logic, is abbreviated as Rad. (b) Numerical simulation results of the optical field distribution on a plasmonic phase adjuster. Here, the width, height, and length of the phase adjuster were 900 nm, 500 nm and 1900 nm, respectively, and the width of the single-mode waveguide was 400 nm. (c) Numerical simulation results of the optical field distribution at the 2 × 2 MMI intensity modulator, where the plasmonic signals were input with no phase difference. (d) Optical field distribution when the input phase difference was set to π/2. The width and length of the 2 × 2 MMI intensity modulator were set to 2800 nm and 7000 nm, respectively. These structures have the potential to be further minimized using gap plasmons.
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f1: Plasmonic logic circuit using the MMI structure.(a) Schematic illustration of an MMI-based plasmonic half adder, composed of 1 × 1 MMI phase adjusters and 2 × 2 MMI intensity modulators. Radiation output, which suppresses radiation loss caused by opposite phase interference in the case of single-mode-waveguide-based logic, is abbreviated as Rad. (b) Numerical simulation results of the optical field distribution on a plasmonic phase adjuster. Here, the width, height, and length of the phase adjuster were 900 nm, 500 nm and 1900 nm, respectively, and the width of the single-mode waveguide was 400 nm. (c) Numerical simulation results of the optical field distribution at the 2 × 2 MMI intensity modulator, where the plasmonic signals were input with no phase difference. (d) Optical field distribution when the input phase difference was set to π/2. The width and length of the 2 × 2 MMI intensity modulator were set to 2800 nm and 7000 nm, respectively. These structures have the potential to be further minimized using gap plasmons.

Mentions: In Fig. 1a, a schematic illustration is shown of the proposed half adder, which combines 1 × 1 MMI phase adjusters (Fig. 1b) and a 2 × 2 MMI intensity modulator (Fig. 1c,d). In the proposed plasmonic circuit, signals propagate along SiO2 stripes with a plasmonic velocity which depends on the effective refractive index, although there is a degree of signal dispersion throughout the MMI structures. The proposed device has two inputs and one reference, where the reference signal intensity was set at 25% of the input signal intensity. In the 2 × 2 MMI intensity modulator, each input plasmon forms an image for each output; hence, the phase difference between the two output signals is π/220. In the 1 × 1 MMI phase adjuster set at the input A and the reference (abbreviated as Ref. in Fig. 1a), the diffracted input SPPs were efficiently coupled to an output waveguide. These structures can be designed to include another optional phase difference between the inputs. By combining these MMI structures, the 2 × 2 MMI intensity modulator is used to obtain an output with an optimal signal intensity, which results from the interference of two inputs with an optimal phase difference.


Plasmonic-multimode-interference-based logic circuit with simple phase adjustment.

Ota M, Sumimura A, Fukuhara M, Ishii Y, Fukuda M - Sci Rep (2016)

Plasmonic logic circuit using the MMI structure.(a) Schematic illustration of an MMI-based plasmonic half adder, composed of 1 × 1 MMI phase adjusters and 2 × 2 MMI intensity modulators. Radiation output, which suppresses radiation loss caused by opposite phase interference in the case of single-mode-waveguide-based logic, is abbreviated as Rad. (b) Numerical simulation results of the optical field distribution on a plasmonic phase adjuster. Here, the width, height, and length of the phase adjuster were 900 nm, 500 nm and 1900 nm, respectively, and the width of the single-mode waveguide was 400 nm. (c) Numerical simulation results of the optical field distribution at the 2 × 2 MMI intensity modulator, where the plasmonic signals were input with no phase difference. (d) Optical field distribution when the input phase difference was set to π/2. The width and length of the 2 × 2 MMI intensity modulator were set to 2800 nm and 7000 nm, respectively. These structures have the potential to be further minimized using gap plasmons.
© Copyright Policy - open-access
Related In: Results  -  Collection

License
Show All Figures
getmorefigures.php?uid=PMC4834483&req=5

f1: Plasmonic logic circuit using the MMI structure.(a) Schematic illustration of an MMI-based plasmonic half adder, composed of 1 × 1 MMI phase adjusters and 2 × 2 MMI intensity modulators. Radiation output, which suppresses radiation loss caused by opposite phase interference in the case of single-mode-waveguide-based logic, is abbreviated as Rad. (b) Numerical simulation results of the optical field distribution on a plasmonic phase adjuster. Here, the width, height, and length of the phase adjuster were 900 nm, 500 nm and 1900 nm, respectively, and the width of the single-mode waveguide was 400 nm. (c) Numerical simulation results of the optical field distribution at the 2 × 2 MMI intensity modulator, where the plasmonic signals were input with no phase difference. (d) Optical field distribution when the input phase difference was set to π/2. The width and length of the 2 × 2 MMI intensity modulator were set to 2800 nm and 7000 nm, respectively. These structures have the potential to be further minimized using gap plasmons.
Mentions: In Fig. 1a, a schematic illustration is shown of the proposed half adder, which combines 1 × 1 MMI phase adjusters (Fig. 1b) and a 2 × 2 MMI intensity modulator (Fig. 1c,d). In the proposed plasmonic circuit, signals propagate along SiO2 stripes with a plasmonic velocity which depends on the effective refractive index, although there is a degree of signal dispersion throughout the MMI structures. The proposed device has two inputs and one reference, where the reference signal intensity was set at 25% of the input signal intensity. In the 2 × 2 MMI intensity modulator, each input plasmon forms an image for each output; hence, the phase difference between the two output signals is π/220. In the 1 × 1 MMI phase adjuster set at the input A and the reference (abbreviated as Ref. in Fig. 1a), the diffracted input SPPs were efficiently coupled to an output waveguide. These structures can be designed to include another optional phase difference between the inputs. By combining these MMI structures, the 2 × 2 MMI intensity modulator is used to obtain an output with an optimal signal intensity, which results from the interference of two inputs with an optimal phase difference.

Bottom Line: Also, simultaneous operations of XOR and AND gates are substantiated experimentally by combining 1 × 1 MMI based phase adjusters and 2 × 2 MMI based intensity modulators.An experimental on-off ratio of at least 4.3 dB is confirmed using scanning near-field optical microscopy.The proposed structure will contribute to high-density plasmonic circuits, fabricated by complementary MOS-compatible process or printing techniques.

View Article: PubMed Central - PubMed

Affiliation: Department of Electrical and Electronic Information Engineering, Toyohashi University of Technology, 1-1 Hibarigaoka, Tempaku-cho, Toyohashi-shi, Aichi 441-8580, Japan.

ABSTRACT
All-optical logic circuits using surface plasmon polaritons have a potential for high-speed information processing with high-density integration beyond the diffraction limit of propagating light. However, a number of logic gates that can be cascaded is limited by complicated signal phase adjustment. In this study, we demonstrate a half-adder operation with simple phase adjustment using plasmonic multimode interference (MMI) devices, composed of dielectric stripes on a metal film, which can be fabricated by a complementary metal-oxide semiconductor (MOS)-compatible process. Also, simultaneous operations of XOR and AND gates are substantiated experimentally by combining 1 × 1 MMI based phase adjusters and 2 × 2 MMI based intensity modulators. An experimental on-off ratio of at least 4.3 dB is confirmed using scanning near-field optical microscopy. The proposed structure will contribute to high-density plasmonic circuits, fabricated by complementary MOS-compatible process or printing techniques.

No MeSH data available.