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Junctionless ferroelectric field effect transistors based on ultrathin silicon nanomembranes.

Cao R, Huang G, Di Z, Zhu G, Mei Y - Nanoscale Res Lett (2014)

Bottom Line: The paper reported the fabrication and operation of nonvolatile ferroelectric field effect transistors (FeFETs) with a top gate and top contact structure.The hysteretic transfer characteristic was attributed to the electrical polarization of the ferroelectric layer which could be switched by a high enough gate voltage.FeFET devices demonstrated good memory performance and were expected to be used in both low power integrated circuit and flexible electronics.

View Article: PubMed Central - PubMed

Affiliation: Department of Materials Science, Fudan University, Shanghai, 200433, People's Republic of China, caoronggen@fudan.edu.cn.

ABSTRACT
The paper reported the fabrication and operation of nonvolatile ferroelectric field effect transistors (FeFETs) with a top gate and top contact structure. Ultrathin Si nanomembranes without source and drain doping were used as the semiconducting layers whose electrical performance was modulated by the polarization of the ferroelectric poly(vinylidene fluoride trifluoroethylene) [P(VDF-TrFE)] thin layer. FeFET devices exhibit both typical output property and obvious bistable operation. The hysteretic transfer characteristic was attributed to the electrical polarization of the ferroelectric layer which could be switched by a high enough gate voltage. FeFET devices demonstrated good memory performance and were expected to be used in both low power integrated circuit and flexible electronics.

No MeSH data available.


Retention characteristic of the SiNM-based FeFETs. ON and OFF states were written by 100-s pulses with amplitudes of 10 and -10 V, respectively.
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Fig4: Retention characteristic of the SiNM-based FeFETs. ON and OFF states were written by 100-s pulses with amplitudes of 10 and -10 V, respectively.

Mentions: Retention performance is especially important for nonvolatile memories, which determines the lifetime of the recorded data. Usually, as for nonvolatile memories, retention characterization should be conducted at 0-V gate voltage to meet the nonvolatile requirement. So here, the retention characteristic of SiNM-based FeFETs was measured by first applying writing gate pulses with a duration of 100 s and amplitude of 10 and -10 V and then recording Ids at Vg = 0 V and Vds = 1 V, respectively, at preset time points. Typical results are shown in Figure 4, where Ids values in both ON and OFF states are plotted as a function of time. Here the ON state corresponds to that written by the +10-V gate pulse while the OFF state to the -10-V pulse. During the writing processes, ON and OFF state currents keep constant at 0.26 and 0.206 mA, respectively. Once the gate pulse is removed, the ON state Ids sharply decreases to 0.23 mA within 130 s and then keeps nearly unchanged in the following 770 s. This sharp decrease of ON state current may be attributed to the depolarization in the ferroelectric layer due to the lack of charge compensation during the application of positive gate voltage, which is considered as one of the main causes of the worse retention performance in ferroelectric field effect transistors [16, 17]. On the other hand, the OFF state Ids slightly decreases to 0.203 mA after the removal of the gate pulse and then keeps constant. In the whole retention measurement, the separation between ON and OFF state current decreases from 54 to 27 μA and the ON and OFF states can still be well distinguished. Especially after the sharp decrease of ON state current in the initial 130 s, both ON and OFF states maintain their currents well, indicating that the SiNM-based FeFETs exhibit good retention performance.Figure 4


Junctionless ferroelectric field effect transistors based on ultrathin silicon nanomembranes.

Cao R, Huang G, Di Z, Zhu G, Mei Y - Nanoscale Res Lett (2014)

Retention characteristic of the SiNM-based FeFETs. ON and OFF states were written by 100-s pulses with amplitudes of 10 and -10 V, respectively.
© Copyright Policy - open-access
Related In: Results  -  Collection

License
Show All Figures
getmorefigures.php?uid=PMC4494014&req=5

Fig4: Retention characteristic of the SiNM-based FeFETs. ON and OFF states were written by 100-s pulses with amplitudes of 10 and -10 V, respectively.
Mentions: Retention performance is especially important for nonvolatile memories, which determines the lifetime of the recorded data. Usually, as for nonvolatile memories, retention characterization should be conducted at 0-V gate voltage to meet the nonvolatile requirement. So here, the retention characteristic of SiNM-based FeFETs was measured by first applying writing gate pulses with a duration of 100 s and amplitude of 10 and -10 V and then recording Ids at Vg = 0 V and Vds = 1 V, respectively, at preset time points. Typical results are shown in Figure 4, where Ids values in both ON and OFF states are plotted as a function of time. Here the ON state corresponds to that written by the +10-V gate pulse while the OFF state to the -10-V pulse. During the writing processes, ON and OFF state currents keep constant at 0.26 and 0.206 mA, respectively. Once the gate pulse is removed, the ON state Ids sharply decreases to 0.23 mA within 130 s and then keeps nearly unchanged in the following 770 s. This sharp decrease of ON state current may be attributed to the depolarization in the ferroelectric layer due to the lack of charge compensation during the application of positive gate voltage, which is considered as one of the main causes of the worse retention performance in ferroelectric field effect transistors [16, 17]. On the other hand, the OFF state Ids slightly decreases to 0.203 mA after the removal of the gate pulse and then keeps constant. In the whole retention measurement, the separation between ON and OFF state current decreases from 54 to 27 μA and the ON and OFF states can still be well distinguished. Especially after the sharp decrease of ON state current in the initial 130 s, both ON and OFF states maintain their currents well, indicating that the SiNM-based FeFETs exhibit good retention performance.Figure 4

Bottom Line: The paper reported the fabrication and operation of nonvolatile ferroelectric field effect transistors (FeFETs) with a top gate and top contact structure.The hysteretic transfer characteristic was attributed to the electrical polarization of the ferroelectric layer which could be switched by a high enough gate voltage.FeFET devices demonstrated good memory performance and were expected to be used in both low power integrated circuit and flexible electronics.

View Article: PubMed Central - PubMed

Affiliation: Department of Materials Science, Fudan University, Shanghai, 200433, People's Republic of China, caoronggen@fudan.edu.cn.

ABSTRACT
The paper reported the fabrication and operation of nonvolatile ferroelectric field effect transistors (FeFETs) with a top gate and top contact structure. Ultrathin Si nanomembranes without source and drain doping were used as the semiconducting layers whose electrical performance was modulated by the polarization of the ferroelectric poly(vinylidene fluoride trifluoroethylene) [P(VDF-TrFE)] thin layer. FeFET devices exhibit both typical output property and obvious bistable operation. The hysteretic transfer characteristic was attributed to the electrical polarization of the ferroelectric layer which could be switched by a high enough gate voltage. FeFET devices demonstrated good memory performance and were expected to be used in both low power integrated circuit and flexible electronics.

No MeSH data available.