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Characterizing the electrical properties of raised S/D junctionless thin-film transistors with a dual-gate structure.

Cheng YC, Chen HB, Su JJ, Shao CS, Wang CP, Chang CY, Wu YC - Nanoscale Res Lett (2014)

Bottom Line: Using a thin channel structure obtains excellent performance in the raised S/D structure.Besides the basic electrical characteristics, the dual-gate structure can also be used to adjust V th in multi-V th circuit designs.This study examines the feasibility of using JL-TFTs in future three-dimensional (3D) layer-to-layer stacked high-density device applications.

View Article: PubMed Central - PubMed

Affiliation: Department of Engineering and System Science, National Tsing Hua University, 101, Section 2, Kuang Fu Road, Hsinchu, 30013, Taiwan, citygirl0831@hotmail.com.

ABSTRACT
This letter demonstrates a p-type raised source-and-drain (raised S/D) junctionless thin-film transistors (JL-TFTs) with a dual-gate structure. The raised S/D structure provides a high saturation current (>1 μA/μm). The subthreshold swing (SS) is 100 mV/decade and the drain-induced barrier lowering (DIBL) is 0.8 mV/V, and the I on/I off current ratio is over 10(8) A/A for L g = 1 μm. Using a thin channel structure obtains excellent performance in the raised S/D structure. Besides the basic electrical characteristics, the dual-gate structure can also be used to adjust V th in multi-V th circuit designs. This study examines the feasibility of using JL-TFTs in future three-dimensional (3D) layer-to-layer stacked high-density device applications.

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Temperature dependence and measured SS and threshold voltage. (a) Temperature dependence (25°C to 200°C) on Id-Vg characteristics at Vd = −0.3 V for the raised S/D JL-TFTs. (b) The dependence of sub-threshold swing (SS) and threshold voltage (Vth) between various temperatures for the p-type raised S/D devices.
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Fig4: Temperature dependence and measured SS and threshold voltage. (a) Temperature dependence (25°C to 200°C) on Id-Vg characteristics at Vd = −0.3 V for the raised S/D JL-TFTs. (b) The dependence of sub-threshold swing (SS) and threshold voltage (Vth) between various temperatures for the p-type raised S/D devices.

Mentions: Figure 2a shows the cross-sectional transmission electron microscopic (TEM) image along the AA’ direction, as shown in Figure 1a. Figure 2b,c displays the enlarged images of Figure 2a. The nano-sheet channel of the raised S/D structure is covered by the omega-gate electrode, which is expected to improve electrostatic gate control and achieve superior performance [11]. Figure 2c clearly shows that the nano-sheet channel thickness is 7.35 nm, and the TEM photograph shows that the single-crystal-like channel with large grain size is expected to achieve superior performance because of the oxidation trimming process. The channel region is doped with a boron concentration of 4 × 1019 cm−3. Figure 3a plots the transfer Id-Vg characteristics of the raised S/D JL-TFT with Lg = 0.5 μm. The on current (Ion) is defined as the drain current at Vg = −6 V for the raised S/D JL-TFT. The off current (Ioff) is defined as the lowest drain current. The excellent transfer characteristics of the raised S/D JL-TFT with Lg = 0.5 μm include the following: (1) subthreshold swing (SS) = 100 mV/decade, (2) DIBL = 0.8 mV/V, and (3) Ion/Ioff current ratio = 3.85 × 108. Figure 3b shows the Id-Vd output characteristics of the raised S/D JL-TFT. The on resistance is low at various over-drive voltages with the raised S/D structure. Figure 4a demonstrates the temperature dependence of the raised S/D JL-TFT. Based on the Id-Vg curves in Figure 4a, Figure 4b presents the measured SS and threshold voltage (Vth) as functions of temperature at Vd = −0.3 V. This figure reveals that, as the temperature increases, the absolute Vth value decreases and the SS increases. The positive shifting of Vth for the raised S/D device is discussed in Figure 4b. The Vth is defined as the gate voltage at Id = 10−9 A. The Vth equation could be presented as the following [12]:1


Characterizing the electrical properties of raised S/D junctionless thin-film transistors with a dual-gate structure.

Cheng YC, Chen HB, Su JJ, Shao CS, Wang CP, Chang CY, Wu YC - Nanoscale Res Lett (2014)

Temperature dependence and measured SS and threshold voltage. (a) Temperature dependence (25°C to 200°C) on Id-Vg characteristics at Vd = −0.3 V for the raised S/D JL-TFTs. (b) The dependence of sub-threshold swing (SS) and threshold voltage (Vth) between various temperatures for the p-type raised S/D devices.
© Copyright Policy - open-access
Related In: Results  -  Collection

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Fig4: Temperature dependence and measured SS and threshold voltage. (a) Temperature dependence (25°C to 200°C) on Id-Vg characteristics at Vd = −0.3 V for the raised S/D JL-TFTs. (b) The dependence of sub-threshold swing (SS) and threshold voltage (Vth) between various temperatures for the p-type raised S/D devices.
Mentions: Figure 2a shows the cross-sectional transmission electron microscopic (TEM) image along the AA’ direction, as shown in Figure 1a. Figure 2b,c displays the enlarged images of Figure 2a. The nano-sheet channel of the raised S/D structure is covered by the omega-gate electrode, which is expected to improve electrostatic gate control and achieve superior performance [11]. Figure 2c clearly shows that the nano-sheet channel thickness is 7.35 nm, and the TEM photograph shows that the single-crystal-like channel with large grain size is expected to achieve superior performance because of the oxidation trimming process. The channel region is doped with a boron concentration of 4 × 1019 cm−3. Figure 3a plots the transfer Id-Vg characteristics of the raised S/D JL-TFT with Lg = 0.5 μm. The on current (Ion) is defined as the drain current at Vg = −6 V for the raised S/D JL-TFT. The off current (Ioff) is defined as the lowest drain current. The excellent transfer characteristics of the raised S/D JL-TFT with Lg = 0.5 μm include the following: (1) subthreshold swing (SS) = 100 mV/decade, (2) DIBL = 0.8 mV/V, and (3) Ion/Ioff current ratio = 3.85 × 108. Figure 3b shows the Id-Vd output characteristics of the raised S/D JL-TFT. The on resistance is low at various over-drive voltages with the raised S/D structure. Figure 4a demonstrates the temperature dependence of the raised S/D JL-TFT. Based on the Id-Vg curves in Figure 4a, Figure 4b presents the measured SS and threshold voltage (Vth) as functions of temperature at Vd = −0.3 V. This figure reveals that, as the temperature increases, the absolute Vth value decreases and the SS increases. The positive shifting of Vth for the raised S/D device is discussed in Figure 4b. The Vth is defined as the gate voltage at Id = 10−9 A. The Vth equation could be presented as the following [12]:1

Bottom Line: Using a thin channel structure obtains excellent performance in the raised S/D structure.Besides the basic electrical characteristics, the dual-gate structure can also be used to adjust V th in multi-V th circuit designs.This study examines the feasibility of using JL-TFTs in future three-dimensional (3D) layer-to-layer stacked high-density device applications.

View Article: PubMed Central - PubMed

Affiliation: Department of Engineering and System Science, National Tsing Hua University, 101, Section 2, Kuang Fu Road, Hsinchu, 30013, Taiwan, citygirl0831@hotmail.com.

ABSTRACT
This letter demonstrates a p-type raised source-and-drain (raised S/D) junctionless thin-film transistors (JL-TFTs) with a dual-gate structure. The raised S/D structure provides a high saturation current (>1 μA/μm). The subthreshold swing (SS) is 100 mV/decade and the drain-induced barrier lowering (DIBL) is 0.8 mV/V, and the I on/I off current ratio is over 10(8) A/A for L g = 1 μm. Using a thin channel structure obtains excellent performance in the raised S/D structure. Besides the basic electrical characteristics, the dual-gate structure can also be used to adjust V th in multi-V th circuit designs. This study examines the feasibility of using JL-TFTs in future three-dimensional (3D) layer-to-layer stacked high-density device applications.

No MeSH data available.


Related in: MedlinePlus