Limits...
AlGaN/GaN MISHEMTs with AlN gate dielectric grown by thermal ALD technique.

Liu XY, Zhao SX, Zhang LQ, Huang HF, Shi JS, Zhang CM, Lu HL, Wang PF, Zhang DW - Nanoscale Res Lett (2015)

Bottom Line: Recently, AlN plasma-enhanced atomic layer deposition (ALD) passivation technique had been proposed and investigated for suppressing the dynamic on-resistance degradation behavior of high-electron-mobility transistors (HEMTs).In this paper, a novel gate dielectric and passivation technique for GaN-on-Si AlGaN/GaN metal-insulator-semiconductor high-electron-mobility transistors (MISHEMTs) is presented.The MISHEMTs with thermal ALD AlN exhibit enhanced on/off ratio, reduced channel sheet resistance, reduction of gate leakage by three orders of magnitude at a bias of 4 V, reduced threshold voltage hysteresis of 60 mV, and suppressed current collapse degradation.

View Article: PubMed Central - PubMed

Affiliation: State Key Laboratory of ASIC and System, School of Microelectronics, Fudan University, 220 Han Dan Road, Shanghai, 200433 China.

ABSTRACT
Recently, AlN plasma-enhanced atomic layer deposition (ALD) passivation technique had been proposed and investigated for suppressing the dynamic on-resistance degradation behavior of high-electron-mobility transistors (HEMTs). In this paper, a novel gate dielectric and passivation technique for GaN-on-Si AlGaN/GaN metal-insulator-semiconductor high-electron-mobility transistors (MISHEMTs) is presented. This technique features the AlN thin film grown by thermal ALD at 400°C without plasma enhancement. A 10.6-nm AlN thin film was grown upon the surface of the HEMT serving as the gate dielectric under the gate electrode and as the passivation layer in the access region at the same time. The MISHEMTs with thermal ALD AlN exhibit enhanced on/off ratio, reduced channel sheet resistance, reduction of gate leakage by three orders of magnitude at a bias of 4 V, reduced threshold voltage hysteresis of 60 mV, and suppressed current collapse degradation.

No MeSH data available.


Related in: MedlinePlus

Schematic cross section and dimensions of the HEMTs. (a) Without AlN gate insulator and (b) with AlN gate insulator. These devices are with source-gate spacing LGS of 1 μm, gate length LG of 2.5 μm, drain-gate spacing LGD of 6 μm, and gate width of 60 μm.
© Copyright Policy - open-access
Related In: Results  -  Collection

License
getmorefigures.php?uid=PMC4385223&req=5

Fig1: Schematic cross section and dimensions of the HEMTs. (a) Without AlN gate insulator and (b) with AlN gate insulator. These devices are with source-gate spacing LGS of 1 μm, gate length LG of 2.5 μm, drain-gate spacing LGD of 6 μm, and gate width of 60 μm.

Mentions: Figure 1a,b shows the schematic cross section of the Schottky gate HEMTs (SGHEMTs) and the AlN HEMTs (AlN-MISHEMTs) with a thermal ALD AlN gate insulator. The measured devices are with a source-gate spacing LGS of 1 μm, gate length LG of 2.5 μm, drain-gate spacing LGD of 6 μm, and gate width of 60 μm.Figure 1


AlGaN/GaN MISHEMTs with AlN gate dielectric grown by thermal ALD technique.

Liu XY, Zhao SX, Zhang LQ, Huang HF, Shi JS, Zhang CM, Lu HL, Wang PF, Zhang DW - Nanoscale Res Lett (2015)

Schematic cross section and dimensions of the HEMTs. (a) Without AlN gate insulator and (b) with AlN gate insulator. These devices are with source-gate spacing LGS of 1 μm, gate length LG of 2.5 μm, drain-gate spacing LGD of 6 μm, and gate width of 60 μm.
© Copyright Policy - open-access
Related In: Results  -  Collection

License
Show All Figures
getmorefigures.php?uid=PMC4385223&req=5

Fig1: Schematic cross section and dimensions of the HEMTs. (a) Without AlN gate insulator and (b) with AlN gate insulator. These devices are with source-gate spacing LGS of 1 μm, gate length LG of 2.5 μm, drain-gate spacing LGD of 6 μm, and gate width of 60 μm.
Mentions: Figure 1a,b shows the schematic cross section of the Schottky gate HEMTs (SGHEMTs) and the AlN HEMTs (AlN-MISHEMTs) with a thermal ALD AlN gate insulator. The measured devices are with a source-gate spacing LGS of 1 μm, gate length LG of 2.5 μm, drain-gate spacing LGD of 6 μm, and gate width of 60 μm.Figure 1

Bottom Line: Recently, AlN plasma-enhanced atomic layer deposition (ALD) passivation technique had been proposed and investigated for suppressing the dynamic on-resistance degradation behavior of high-electron-mobility transistors (HEMTs).In this paper, a novel gate dielectric and passivation technique for GaN-on-Si AlGaN/GaN metal-insulator-semiconductor high-electron-mobility transistors (MISHEMTs) is presented.The MISHEMTs with thermal ALD AlN exhibit enhanced on/off ratio, reduced channel sheet resistance, reduction of gate leakage by three orders of magnitude at a bias of 4 V, reduced threshold voltage hysteresis of 60 mV, and suppressed current collapse degradation.

View Article: PubMed Central - PubMed

Affiliation: State Key Laboratory of ASIC and System, School of Microelectronics, Fudan University, 220 Han Dan Road, Shanghai, 200433 China.

ABSTRACT
Recently, AlN plasma-enhanced atomic layer deposition (ALD) passivation technique had been proposed and investigated for suppressing the dynamic on-resistance degradation behavior of high-electron-mobility transistors (HEMTs). In this paper, a novel gate dielectric and passivation technique for GaN-on-Si AlGaN/GaN metal-insulator-semiconductor high-electron-mobility transistors (MISHEMTs) is presented. This technique features the AlN thin film grown by thermal ALD at 400°C without plasma enhancement. A 10.6-nm AlN thin film was grown upon the surface of the HEMT serving as the gate dielectric under the gate electrode and as the passivation layer in the access region at the same time. The MISHEMTs with thermal ALD AlN exhibit enhanced on/off ratio, reduced channel sheet resistance, reduction of gate leakage by three orders of magnitude at a bias of 4 V, reduced threshold voltage hysteresis of 60 mV, and suppressed current collapse degradation.

No MeSH data available.


Related in: MedlinePlus