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FPGA techniques based new hybrid modulation strategies for voltage source inverters.

Sudha LU, Baskaran J, Elankurisil SA - ScientificWorldJournal (2015)

Bottom Line: Thus, the harmonic pollution in the power system will be reduced and the power quality will be augmented with better harmonic profile for a target fundamental output voltage.The proposed modulation strategies are simulated in MATLAB r2010a and implemented in a Xilinx spartan 3E-500 FG 320 FPGA processor.The feasibility of these modulation strategies is authenticated through simulation and experimental results.

View Article: PubMed Central - PubMed

Affiliation: Department of Electrical and Electronics Engineering, ES Engineering College, Villupuram 605602, India.

ABSTRACT
This paper corroborates three different hybrid modulation strategies suitable for single-phase voltage source inverter. The proposed method is formulated using fundamental switching and carrier based pulse width modulation methods. The main tale of this proposed method is to optimize a specific performance criterion, such as minimization of the total harmonic distortion (THD), lower order harmonics, switching losses, and heat losses. The proposed method is articulated using fundamental switching and carrier based pulse width modulation methods. Thus, the harmonic pollution in the power system will be reduced and the power quality will be augmented with better harmonic profile for a target fundamental output voltage. The proposed modulation strategies are simulated in MATLAB r2010a and implemented in a Xilinx spartan 3E-500 FG 320 FPGA processor. The feasibility of these modulation strategies is authenticated through simulation and experimental results.

No MeSH data available.


Related in: MedlinePlus

HSDPWM (a) pulse pattern, (b) output voltage waveform, and (c) harmonic spectrum.
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fig9: HSDPWM (a) pulse pattern, (b) output voltage waveform, and (c) harmonic spectrum.

Mentions: The hardware rig is constituted using MOSFETs (IRF 840), laboratory variable dc-link voltage setup and resistive-inductive load of R = 100 Ω and L = 100 mH. The control algorithm is implemented in Xilinx Spartan 3E-500 FG 320 field programmable gate array (FPGA) processor. It incorporates a facility to be either configured or reconfigured by the application engineer. The Spartan 3E-500 FG 320 has on-board high-speed USB port, 500 K logic gates, 16 MB of PSDRAM, 16 MB of Intel strata flash ROM, and 60 FPGA input/output routed to expansion connectors. Xilinx offers CAD tools for the development of ASIC based FPGA and VHDL is used in digital logic design. The algorithm is then complied and simulated using Modelsim software. The bit file is generated in Xilinx software and finally downloaded to the Spartan 3E device through USB cable. The downloaded pulses are applied to single-phase inverter to produce the PWM modulated output voltage waveform. The download pulses, load output voltage waveform along with voltage spectrum, are captured through Tektronix TPS 2024 scope which is shown in Figures 7to 9, respectively. It is evident from Figures 7to 9 that the simulation outputs accorded with the experimental results.


FPGA techniques based new hybrid modulation strategies for voltage source inverters.

Sudha LU, Baskaran J, Elankurisil SA - ScientificWorldJournal (2015)

HSDPWM (a) pulse pattern, (b) output voltage waveform, and (c) harmonic spectrum.
© Copyright Policy - open-access
Related In: Results  -  Collection

Show All Figures
getmorefigures.php?uid=PMC4364377&req=5

fig9: HSDPWM (a) pulse pattern, (b) output voltage waveform, and (c) harmonic spectrum.
Mentions: The hardware rig is constituted using MOSFETs (IRF 840), laboratory variable dc-link voltage setup and resistive-inductive load of R = 100 Ω and L = 100 mH. The control algorithm is implemented in Xilinx Spartan 3E-500 FG 320 field programmable gate array (FPGA) processor. It incorporates a facility to be either configured or reconfigured by the application engineer. The Spartan 3E-500 FG 320 has on-board high-speed USB port, 500 K logic gates, 16 MB of PSDRAM, 16 MB of Intel strata flash ROM, and 60 FPGA input/output routed to expansion connectors. Xilinx offers CAD tools for the development of ASIC based FPGA and VHDL is used in digital logic design. The algorithm is then complied and simulated using Modelsim software. The bit file is generated in Xilinx software and finally downloaded to the Spartan 3E device through USB cable. The downloaded pulses are applied to single-phase inverter to produce the PWM modulated output voltage waveform. The download pulses, load output voltage waveform along with voltage spectrum, are captured through Tektronix TPS 2024 scope which is shown in Figures 7to 9, respectively. It is evident from Figures 7to 9 that the simulation outputs accorded with the experimental results.

Bottom Line: Thus, the harmonic pollution in the power system will be reduced and the power quality will be augmented with better harmonic profile for a target fundamental output voltage.The proposed modulation strategies are simulated in MATLAB r2010a and implemented in a Xilinx spartan 3E-500 FG 320 FPGA processor.The feasibility of these modulation strategies is authenticated through simulation and experimental results.

View Article: PubMed Central - PubMed

Affiliation: Department of Electrical and Electronics Engineering, ES Engineering College, Villupuram 605602, India.

ABSTRACT
This paper corroborates three different hybrid modulation strategies suitable for single-phase voltage source inverter. The proposed method is formulated using fundamental switching and carrier based pulse width modulation methods. The main tale of this proposed method is to optimize a specific performance criterion, such as minimization of the total harmonic distortion (THD), lower order harmonics, switching losses, and heat losses. The proposed method is articulated using fundamental switching and carrier based pulse width modulation methods. Thus, the harmonic pollution in the power system will be reduced and the power quality will be augmented with better harmonic profile for a target fundamental output voltage. The proposed modulation strategies are simulated in MATLAB r2010a and implemented in a Xilinx spartan 3E-500 FG 320 FPGA processor. The feasibility of these modulation strategies is authenticated through simulation and experimental results.

No MeSH data available.


Related in: MedlinePlus