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Hall and field-effect mobilities in few layered p-WSe₂ field-effect transistors.

Pradhan NR, Rhodes D, Memaran S, Poumirol JM, Smirnov D, Talapatra S, Feng S, Perea-Lopez N, Elias AL, Terrones M, Ajayan PM, Balicas L - Sci Rep (2015)

Bottom Line: Here, we present a temperature (T) dependent comparison between field-effect and Hall mobilities in field-effect transistors based on few-layered WSe2 exfoliated onto SiO2.The hole Hall mobility reaches a maximum value of 650 cm(2)/Vs as T is lowered below ~150 K, indicating that insofar WSe2-based field-effect transistors (FETs) display the largest Hall mobilities among the transition metal dichalcogenides.The gate capacitance, as extracted from the Hall-effect, reveals the presence of spurious charges in the channel, while the two-terminal sheet resistivity displays two-dimensional variable-range hopping behavior, indicating carrier localization induced by disorder at the interface between WSe2 and SiO2.

View Article: PubMed Central - PubMed

Affiliation: National High Magnetic Field Laboratory, Florida State University, Tallahassee-FL 32310, USA.

ABSTRACT
Here, we present a temperature (T) dependent comparison between field-effect and Hall mobilities in field-effect transistors based on few-layered WSe2 exfoliated onto SiO2. Without dielectric engineering and beyond a T-dependent threshold gate-voltage, we observe maximum hole mobilities approaching 350 cm(2)/Vs at T = 300 K. The hole Hall mobility reaches a maximum value of 650 cm(2)/Vs as T is lowered below ~150 K, indicating that insofar WSe2-based field-effect transistors (FETs) display the largest Hall mobilities among the transition metal dichalcogenides. The gate capacitance, as extracted from the Hall-effect, reveals the presence of spurious charges in the channel, while the two-terminal sheet resistivity displays two-dimensional variable-range hopping behavior, indicating carrier localization induced by disorder at the interface between WSe2 and SiO2. We argue that improvements in the fabrication protocols as, for example, the use of a substrate free of dangling bonds are likely to produce WSe2-based FETs displaying higher room temperature mobilities, i.e. approaching those of p-doped Si, which would make it a suitable candidate for high performance opto-electronics.

No MeSH data available.


Related in: MedlinePlus

(a) Four-terminal sheet resistance Rxx measured at a temperature of T = 300 K and as a function of Vbg for a second multilayered WSe2 FET after annealing it under vacuum for 24 h. (b) Hall response Rxy = VH(H)/Ids as a function of the external magnetic field H, and for several values of the gate voltage Vbg. Red lines are linear fits from whose slope we extract the values of the Hall constant RH( = VH/HIds). (c) Density of carriers nH = 1/(eRH) induced by the back gate voltage as a function of Vbg. Red lines are linear fits from which, by comparing the resulting slope σ = n/Vbg = cg*/e (cg* is the effective gate capacitance). (d) Field-effect μFE (magenta and blue lines) and Hall μH = RH/ρxx (red markers) mobilities (where ρxx = Rxxw/l, w and l are the width and the length of the channel, respectively) as functions of Vbg at T = 300 K. (e) Extracted Hall mobility μH as a function of T and for several values of Vbg. μH increases as T is lowered, but subsequently it is seen to decrease below a Vbg -dependent T. (f) Ratio between experimentally extracted and the ideal, or geometrical gate capacitances cg*/cg (black markers) and the mobilities μi = cg*/cg μH (Vbg = −60 V) (red markers) as functions of T. μi are the mobility values that one would obtain if the gate capacitance displayed its ideal cg value in absence of spurious charges in the channel.
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f7: (a) Four-terminal sheet resistance Rxx measured at a temperature of T = 300 K and as a function of Vbg for a second multilayered WSe2 FET after annealing it under vacuum for 24 h. (b) Hall response Rxy = VH(H)/Ids as a function of the external magnetic field H, and for several values of the gate voltage Vbg. Red lines are linear fits from whose slope we extract the values of the Hall constant RH( = VH/HIds). (c) Density of carriers nH = 1/(eRH) induced by the back gate voltage as a function of Vbg. Red lines are linear fits from which, by comparing the resulting slope σ = n/Vbg = cg*/e (cg* is the effective gate capacitance). (d) Field-effect μFE (magenta and blue lines) and Hall μH = RH/ρxx (red markers) mobilities (where ρxx = Rxxw/l, w and l are the width and the length of the channel, respectively) as functions of Vbg at T = 300 K. (e) Extracted Hall mobility μH as a function of T and for several values of Vbg. μH increases as T is lowered, but subsequently it is seen to decrease below a Vbg -dependent T. (f) Ratio between experimentally extracted and the ideal, or geometrical gate capacitances cg*/cg (black markers) and the mobilities μi = cg*/cg μH (Vbg = −60 V) (red markers) as functions of T. μi are the mobility values that one would obtain if the gate capacitance displayed its ideal cg value in absence of spurious charges in the channel.

Mentions: In Figure 7, we compare the above field-effect mobilities with Hall mobility measurements on a second, vacuum annealed flake of similar thickness. Figure 7 a shows the four-terminal sheet resistivity, i.e. ρxx = wVds/lIds as a function of Vbg. ρxx was measured with a lock-in technique, for gate voltages where the voltages V12 or V34 were in phase with the excitation signal. We also checked that any pair of voltage contacts produced nearly the same value for ρxx, indicating a nearly uniform current throughout the channel. ρxx increases very rapidly, beyond 109 Ω as Vbg → 0 V. Also the out-of-phase component of the measured AC signal becomes very large as Vbg → 0 limiting the Vbg range for our measurements. Figure 7b displays the measured Hall signal Rxy as a function of the magnetic field H at T = 50 K and for several values of Vbg. Red lines are linear fits from which we extract the Hall constant RH = Rxy/H = 1/ne. In the same Fig. 7b we also indicate the extracted values for the Hall mobilities, μH = RH/ρxx, at different gate voltages. Notice that for T = 50 K and Vbg = 70 V one obtains, in this annealed sample, a μH value of ~676 cm2/Vs. Figure 7c shows the density of carriers nH = 1/eRH as a function of Vbg for several Ts. Red lines are linear fits from which we extract the slope nH/Vbg = cg*/e, where cg* is an effective back-gate capacitance: in the absence of extrinsic charged defects at the WSe2/SiO2 interface, cg* should be equal to the previously quoted gate capacitance cg. Solid evidence for the existence of ionized impurities acting as hole traps at the interface is provided by the linear fits in Fig. 7c which intercepts the nH = 0 axis at finite threshold gate voltages Vtbg. This confirms that practically all holes generated by applying a gate voltage smaller than Vtbg remain localized at the interface. Figure 7d shows a comparison between μFE (magenta and blue lines) and μH (red markers) as extracted from the same device at room temperature. The blue line was measured after thermally cycling the FET down to low temperatures. Notice how Vtbg increases after thermally cycling the sample, thus suggesting that strain at the interface, resulting from the difference between the thermal expansion coefficients of SiO2 and WSe2, also contributes to Vtbg. Therefore, strain would seem to be an additional factor contributing to the mobility edge. Notice also that both mobilities initially increase as a function /Vbg/, reaching a maximum at the same Vbg value, decreasing subsequently as the back-gate voltage is further increased. Figure 7e shows μH as a function of T for several values of Vbg. Notice how μH (T → 0 K) is suppressed at low gate voltages due to the charge localization mechanism discussed above. μH is observed to increase as T is lowered, requiring ever increasing values of Vbg > Vtbg, but decreases again below T ~5 K. A fit of μH(T, Vbg = −60 V) to AT−α yields α ~ (1 ± 0.1). Finally Fig. 7f displays the T-dependence of the ratio between the measured and the ideal geometrical gate capacitance (cg* = se)/cg where s corresponds to the slopes extracted from the linear-fits in Fig. 7c. For a perfect FET this ratio should be equal to 1, i.e. the only charges in the conducting channel should be those resulting from the electric field-effect. Therefore, one can estimate the carrier mobility μi for the nearly ideal device, i.e. with the ideal geometrical capacitance, through μi = cg*/cg μH, which at T = 300 K would lead to Vbg-dependent mobilities ranging from 350 up to 525 cm2/Vs. This rough estimate does not take into account scattering processes resulting from for example, other sources of disorder within the channel. In agreement with Ref. 40, this indicates that in our WSe2 FETs the main scattering mechanism limiting the carrier mobility are not phonons, but ionized impurities and disorder, or that phonon scattering would still allow mobilities approaching, and probably surpassing, 500 cm2/Vs at room temperature. In p-doped Si the hole-mobility is observed to saturate at a value of ~475 cm2/Vs for doping levels below ~1017 per cm3, while a doping concentration of 1019 per cm3 yields mobilities of ~200 cm2/Vs as observed here8. Therefore, our work indicates that if one was able to improve the FET fabrication protocols, by minimizing the disorder such as interface roughness, spurious ionized impurities and dangling bonds at the interface, WSe2 could match the performance of p-doped Si, thus becoming suitable for specific applications5 with the added advantage of miniaturization, since the starting point would be just a few atomic layers.


Hall and field-effect mobilities in few layered p-WSe₂ field-effect transistors.

Pradhan NR, Rhodes D, Memaran S, Poumirol JM, Smirnov D, Talapatra S, Feng S, Perea-Lopez N, Elias AL, Terrones M, Ajayan PM, Balicas L - Sci Rep (2015)

(a) Four-terminal sheet resistance Rxx measured at a temperature of T = 300 K and as a function of Vbg for a second multilayered WSe2 FET after annealing it under vacuum for 24 h. (b) Hall response Rxy = VH(H)/Ids as a function of the external magnetic field H, and for several values of the gate voltage Vbg. Red lines are linear fits from whose slope we extract the values of the Hall constant RH( = VH/HIds). (c) Density of carriers nH = 1/(eRH) induced by the back gate voltage as a function of Vbg. Red lines are linear fits from which, by comparing the resulting slope σ = n/Vbg = cg*/e (cg* is the effective gate capacitance). (d) Field-effect μFE (magenta and blue lines) and Hall μH = RH/ρxx (red markers) mobilities (where ρxx = Rxxw/l, w and l are the width and the length of the channel, respectively) as functions of Vbg at T = 300 K. (e) Extracted Hall mobility μH as a function of T and for several values of Vbg. μH increases as T is lowered, but subsequently it is seen to decrease below a Vbg -dependent T. (f) Ratio between experimentally extracted and the ideal, or geometrical gate capacitances cg*/cg (black markers) and the mobilities μi = cg*/cg μH (Vbg = −60 V) (red markers) as functions of T. μi are the mobility values that one would obtain if the gate capacitance displayed its ideal cg value in absence of spurious charges in the channel.
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f7: (a) Four-terminal sheet resistance Rxx measured at a temperature of T = 300 K and as a function of Vbg for a second multilayered WSe2 FET after annealing it under vacuum for 24 h. (b) Hall response Rxy = VH(H)/Ids as a function of the external magnetic field H, and for several values of the gate voltage Vbg. Red lines are linear fits from whose slope we extract the values of the Hall constant RH( = VH/HIds). (c) Density of carriers nH = 1/(eRH) induced by the back gate voltage as a function of Vbg. Red lines are linear fits from which, by comparing the resulting slope σ = n/Vbg = cg*/e (cg* is the effective gate capacitance). (d) Field-effect μFE (magenta and blue lines) and Hall μH = RH/ρxx (red markers) mobilities (where ρxx = Rxxw/l, w and l are the width and the length of the channel, respectively) as functions of Vbg at T = 300 K. (e) Extracted Hall mobility μH as a function of T and for several values of Vbg. μH increases as T is lowered, but subsequently it is seen to decrease below a Vbg -dependent T. (f) Ratio between experimentally extracted and the ideal, or geometrical gate capacitances cg*/cg (black markers) and the mobilities μi = cg*/cg μH (Vbg = −60 V) (red markers) as functions of T. μi are the mobility values that one would obtain if the gate capacitance displayed its ideal cg value in absence of spurious charges in the channel.
Mentions: In Figure 7, we compare the above field-effect mobilities with Hall mobility measurements on a second, vacuum annealed flake of similar thickness. Figure 7 a shows the four-terminal sheet resistivity, i.e. ρxx = wVds/lIds as a function of Vbg. ρxx was measured with a lock-in technique, for gate voltages where the voltages V12 or V34 were in phase with the excitation signal. We also checked that any pair of voltage contacts produced nearly the same value for ρxx, indicating a nearly uniform current throughout the channel. ρxx increases very rapidly, beyond 109 Ω as Vbg → 0 V. Also the out-of-phase component of the measured AC signal becomes very large as Vbg → 0 limiting the Vbg range for our measurements. Figure 7b displays the measured Hall signal Rxy as a function of the magnetic field H at T = 50 K and for several values of Vbg. Red lines are linear fits from which we extract the Hall constant RH = Rxy/H = 1/ne. In the same Fig. 7b we also indicate the extracted values for the Hall mobilities, μH = RH/ρxx, at different gate voltages. Notice that for T = 50 K and Vbg = 70 V one obtains, in this annealed sample, a μH value of ~676 cm2/Vs. Figure 7c shows the density of carriers nH = 1/eRH as a function of Vbg for several Ts. Red lines are linear fits from which we extract the slope nH/Vbg = cg*/e, where cg* is an effective back-gate capacitance: in the absence of extrinsic charged defects at the WSe2/SiO2 interface, cg* should be equal to the previously quoted gate capacitance cg. Solid evidence for the existence of ionized impurities acting as hole traps at the interface is provided by the linear fits in Fig. 7c which intercepts the nH = 0 axis at finite threshold gate voltages Vtbg. This confirms that practically all holes generated by applying a gate voltage smaller than Vtbg remain localized at the interface. Figure 7d shows a comparison between μFE (magenta and blue lines) and μH (red markers) as extracted from the same device at room temperature. The blue line was measured after thermally cycling the FET down to low temperatures. Notice how Vtbg increases after thermally cycling the sample, thus suggesting that strain at the interface, resulting from the difference between the thermal expansion coefficients of SiO2 and WSe2, also contributes to Vtbg. Therefore, strain would seem to be an additional factor contributing to the mobility edge. Notice also that both mobilities initially increase as a function /Vbg/, reaching a maximum at the same Vbg value, decreasing subsequently as the back-gate voltage is further increased. Figure 7e shows μH as a function of T for several values of Vbg. Notice how μH (T → 0 K) is suppressed at low gate voltages due to the charge localization mechanism discussed above. μH is observed to increase as T is lowered, requiring ever increasing values of Vbg > Vtbg, but decreases again below T ~5 K. A fit of μH(T, Vbg = −60 V) to AT−α yields α ~ (1 ± 0.1). Finally Fig. 7f displays the T-dependence of the ratio between the measured and the ideal geometrical gate capacitance (cg* = se)/cg where s corresponds to the slopes extracted from the linear-fits in Fig. 7c. For a perfect FET this ratio should be equal to 1, i.e. the only charges in the conducting channel should be those resulting from the electric field-effect. Therefore, one can estimate the carrier mobility μi for the nearly ideal device, i.e. with the ideal geometrical capacitance, through μi = cg*/cg μH, which at T = 300 K would lead to Vbg-dependent mobilities ranging from 350 up to 525 cm2/Vs. This rough estimate does not take into account scattering processes resulting from for example, other sources of disorder within the channel. In agreement with Ref. 40, this indicates that in our WSe2 FETs the main scattering mechanism limiting the carrier mobility are not phonons, but ionized impurities and disorder, or that phonon scattering would still allow mobilities approaching, and probably surpassing, 500 cm2/Vs at room temperature. In p-doped Si the hole-mobility is observed to saturate at a value of ~475 cm2/Vs for doping levels below ~1017 per cm3, while a doping concentration of 1019 per cm3 yields mobilities of ~200 cm2/Vs as observed here8. Therefore, our work indicates that if one was able to improve the FET fabrication protocols, by minimizing the disorder such as interface roughness, spurious ionized impurities and dangling bonds at the interface, WSe2 could match the performance of p-doped Si, thus becoming suitable for specific applications5 with the added advantage of miniaturization, since the starting point would be just a few atomic layers.

Bottom Line: Here, we present a temperature (T) dependent comparison between field-effect and Hall mobilities in field-effect transistors based on few-layered WSe2 exfoliated onto SiO2.The hole Hall mobility reaches a maximum value of 650 cm(2)/Vs as T is lowered below ~150 K, indicating that insofar WSe2-based field-effect transistors (FETs) display the largest Hall mobilities among the transition metal dichalcogenides.The gate capacitance, as extracted from the Hall-effect, reveals the presence of spurious charges in the channel, while the two-terminal sheet resistivity displays two-dimensional variable-range hopping behavior, indicating carrier localization induced by disorder at the interface between WSe2 and SiO2.

View Article: PubMed Central - PubMed

Affiliation: National High Magnetic Field Laboratory, Florida State University, Tallahassee-FL 32310, USA.

ABSTRACT
Here, we present a temperature (T) dependent comparison between field-effect and Hall mobilities in field-effect transistors based on few-layered WSe2 exfoliated onto SiO2. Without dielectric engineering and beyond a T-dependent threshold gate-voltage, we observe maximum hole mobilities approaching 350 cm(2)/Vs at T = 300 K. The hole Hall mobility reaches a maximum value of 650 cm(2)/Vs as T is lowered below ~150 K, indicating that insofar WSe2-based field-effect transistors (FETs) display the largest Hall mobilities among the transition metal dichalcogenides. The gate capacitance, as extracted from the Hall-effect, reveals the presence of spurious charges in the channel, while the two-terminal sheet resistivity displays two-dimensional variable-range hopping behavior, indicating carrier localization induced by disorder at the interface between WSe2 and SiO2. We argue that improvements in the fabrication protocols as, for example, the use of a substrate free of dangling bonds are likely to produce WSe2-based FETs displaying higher room temperature mobilities, i.e. approaching those of p-doped Si, which would make it a suitable candidate for high performance opto-electronics.

No MeSH data available.


Related in: MedlinePlus