Limits...
Hall and field-effect mobilities in few layered p-WSe₂ field-effect transistors.

Pradhan NR, Rhodes D, Memaran S, Poumirol JM, Smirnov D, Talapatra S, Feng S, Perea-Lopez N, Elias AL, Terrones M, Ajayan PM, Balicas L - Sci Rep (2015)

Bottom Line: Here, we present a temperature (T) dependent comparison between field-effect and Hall mobilities in field-effect transistors based on few-layered WSe2 exfoliated onto SiO2.The hole Hall mobility reaches a maximum value of 650 cm(2)/Vs as T is lowered below ~150 K, indicating that insofar WSe2-based field-effect transistors (FETs) display the largest Hall mobilities among the transition metal dichalcogenides.The gate capacitance, as extracted from the Hall-effect, reveals the presence of spurious charges in the channel, while the two-terminal sheet resistivity displays two-dimensional variable-range hopping behavior, indicating carrier localization induced by disorder at the interface between WSe2 and SiO2.

View Article: PubMed Central - PubMed

Affiliation: National High Magnetic Field Laboratory, Florida State University, Tallahassee-FL 32310, USA.

ABSTRACT
Here, we present a temperature (T) dependent comparison between field-effect and Hall mobilities in field-effect transistors based on few-layered WSe2 exfoliated onto SiO2. Without dielectric engineering and beyond a T-dependent threshold gate-voltage, we observe maximum hole mobilities approaching 350 cm(2)/Vs at T = 300 K. The hole Hall mobility reaches a maximum value of 650 cm(2)/Vs as T is lowered below ~150 K, indicating that insofar WSe2-based field-effect transistors (FETs) display the largest Hall mobilities among the transition metal dichalcogenides. The gate capacitance, as extracted from the Hall-effect, reveals the presence of spurious charges in the channel, while the two-terminal sheet resistivity displays two-dimensional variable-range hopping behavior, indicating carrier localization induced by disorder at the interface between WSe2 and SiO2. We argue that improvements in the fabrication protocols as, for example, the use of a substrate free of dangling bonds are likely to produce WSe2-based FETs displaying higher room temperature mobilities, i.e. approaching those of p-doped Si, which would make it a suitable candidate for high performance opto-electronics.

No MeSH data available.


Related in: MedlinePlus

(a) Micrograph of the one of our WSe2 field-effect transistors on a 270 nm thick SiO2 layer on p-doped Si. Contacts, (Ti/Au) used to inject the electrical current (Ids), are indicated through labels I+ (source) and I− (drain), while the resistivity of the device ρxx was measured through either the pair of voltage contacts labeled as 1 and 2 or pair 3 and 4. The Hall resistance Rxy was measured with an AC excitation either through the pair of contacts 1 and 3 or 2 and 4. Length l of the channel, or the separation between the current contacts, is l = 15.8 μm while the width of the channel is w = 7.7 μm. (b) Height profile (along the blue line shown in the inset) indicating a thickness of 80 Å, or approximately 12 atomic layers for the crystal in (a). Inset: atomic force microscopy image collected from a lateral edge of the WSe2 crystal in (a). (c) Side view sketch of our field-effect transistor(s), indicating that the Ti/Au pads contact all atomic layers, and of the experimental configuration of measurements. (d) Room temperature field-effect mobility μFE as a function of crystal thickness extracted from several FETs based on WSe2 exfoliated onto SiO2. The maximum mobility is observed for ~12 atomic layers.
© Copyright Policy - open-access
Related In: Results  -  Collection

License
getmorefigures.php?uid=PMC4355631&req=5

f1: (a) Micrograph of the one of our WSe2 field-effect transistors on a 270 nm thick SiO2 layer on p-doped Si. Contacts, (Ti/Au) used to inject the electrical current (Ids), are indicated through labels I+ (source) and I− (drain), while the resistivity of the device ρxx was measured through either the pair of voltage contacts labeled as 1 and 2 or pair 3 and 4. The Hall resistance Rxy was measured with an AC excitation either through the pair of contacts 1 and 3 or 2 and 4. Length l of the channel, or the separation between the current contacts, is l = 15.8 μm while the width of the channel is w = 7.7 μm. (b) Height profile (along the blue line shown in the inset) indicating a thickness of 80 Å, or approximately 12 atomic layers for the crystal in (a). Inset: atomic force microscopy image collected from a lateral edge of the WSe2 crystal in (a). (c) Side view sketch of our field-effect transistor(s), indicating that the Ti/Au pads contact all atomic layers, and of the experimental configuration of measurements. (d) Room temperature field-effect mobility μFE as a function of crystal thickness extracted from several FETs based on WSe2 exfoliated onto SiO2. The maximum mobility is observed for ~12 atomic layers.

Mentions: Figures 1a and b show respectively, a micrograph of a typical device, whose experimental results will be discussed throughout this manuscript, and the sketch of a four-terminal configuration for conductance measurements. Current source I+ and drain I− terminals, as well as the pairs of voltage contacts 1, 2 and 3, 4 are indicated. As shown below, this configuration of contacts allows us to compare electrical transport measurements performed when using a 2-contact configuration (e.g. μFE) with a 4-terminal one (e.g. Rxy or the Hall-effect). Figure 1b shows an atomic force microscopy profile and image (inset) from which we extract a flake thickness of ~8 nm, or approximately 12 atomic layers. We chose to focus on multi-layered FETs because our preliminary observations agree with those of Refs. 19, 20, indicating that the highest mobilities are observed in flakes with thicknesses between ~10 and 15 atomic layers as shown in Fig. 1d. In addition, as argued in Ref. 5 multilayered flakes should lead to thin film transistors yielding higher drive currents when compared to transistors based on single atomic layers, possibly making multilayered FETs more suitable for high-resolution liquid crystal and organic light-emitting diode displays5. Our flakes were mechanically exfoliated and transferred onto a 270 nm thick SiO2 layer grown on p-doped Si, which is used as a back gate. Throughout this study, we focus on devices with thicknesses ranging from 9 to 15 layers. Three of the devices were annealed at 150 °C, under high vacuum for 24 h, which as reported in Ref. 17, yields higher mobilities particularly at low temperatures. We found very similar overall response among the non-annealed samples, as well as among the annealed ones.


Hall and field-effect mobilities in few layered p-WSe₂ field-effect transistors.

Pradhan NR, Rhodes D, Memaran S, Poumirol JM, Smirnov D, Talapatra S, Feng S, Perea-Lopez N, Elias AL, Terrones M, Ajayan PM, Balicas L - Sci Rep (2015)

(a) Micrograph of the one of our WSe2 field-effect transistors on a 270 nm thick SiO2 layer on p-doped Si. Contacts, (Ti/Au) used to inject the electrical current (Ids), are indicated through labels I+ (source) and I− (drain), while the resistivity of the device ρxx was measured through either the pair of voltage contacts labeled as 1 and 2 or pair 3 and 4. The Hall resistance Rxy was measured with an AC excitation either through the pair of contacts 1 and 3 or 2 and 4. Length l of the channel, or the separation between the current contacts, is l = 15.8 μm while the width of the channel is w = 7.7 μm. (b) Height profile (along the blue line shown in the inset) indicating a thickness of 80 Å, or approximately 12 atomic layers for the crystal in (a). Inset: atomic force microscopy image collected from a lateral edge of the WSe2 crystal in (a). (c) Side view sketch of our field-effect transistor(s), indicating that the Ti/Au pads contact all atomic layers, and of the experimental configuration of measurements. (d) Room temperature field-effect mobility μFE as a function of crystal thickness extracted from several FETs based on WSe2 exfoliated onto SiO2. The maximum mobility is observed for ~12 atomic layers.
© Copyright Policy - open-access
Related In: Results  -  Collection

License
Show All Figures
getmorefigures.php?uid=PMC4355631&req=5

f1: (a) Micrograph of the one of our WSe2 field-effect transistors on a 270 nm thick SiO2 layer on p-doped Si. Contacts, (Ti/Au) used to inject the electrical current (Ids), are indicated through labels I+ (source) and I− (drain), while the resistivity of the device ρxx was measured through either the pair of voltage contacts labeled as 1 and 2 or pair 3 and 4. The Hall resistance Rxy was measured with an AC excitation either through the pair of contacts 1 and 3 or 2 and 4. Length l of the channel, or the separation between the current contacts, is l = 15.8 μm while the width of the channel is w = 7.7 μm. (b) Height profile (along the blue line shown in the inset) indicating a thickness of 80 Å, or approximately 12 atomic layers for the crystal in (a). Inset: atomic force microscopy image collected from a lateral edge of the WSe2 crystal in (a). (c) Side view sketch of our field-effect transistor(s), indicating that the Ti/Au pads contact all atomic layers, and of the experimental configuration of measurements. (d) Room temperature field-effect mobility μFE as a function of crystal thickness extracted from several FETs based on WSe2 exfoliated onto SiO2. The maximum mobility is observed for ~12 atomic layers.
Mentions: Figures 1a and b show respectively, a micrograph of a typical device, whose experimental results will be discussed throughout this manuscript, and the sketch of a four-terminal configuration for conductance measurements. Current source I+ and drain I− terminals, as well as the pairs of voltage contacts 1, 2 and 3, 4 are indicated. As shown below, this configuration of contacts allows us to compare electrical transport measurements performed when using a 2-contact configuration (e.g. μFE) with a 4-terminal one (e.g. Rxy or the Hall-effect). Figure 1b shows an atomic force microscopy profile and image (inset) from which we extract a flake thickness of ~8 nm, or approximately 12 atomic layers. We chose to focus on multi-layered FETs because our preliminary observations agree with those of Refs. 19, 20, indicating that the highest mobilities are observed in flakes with thicknesses between ~10 and 15 atomic layers as shown in Fig. 1d. In addition, as argued in Ref. 5 multilayered flakes should lead to thin film transistors yielding higher drive currents when compared to transistors based on single atomic layers, possibly making multilayered FETs more suitable for high-resolution liquid crystal and organic light-emitting diode displays5. Our flakes were mechanically exfoliated and transferred onto a 270 nm thick SiO2 layer grown on p-doped Si, which is used as a back gate. Throughout this study, we focus on devices with thicknesses ranging from 9 to 15 layers. Three of the devices were annealed at 150 °C, under high vacuum for 24 h, which as reported in Ref. 17, yields higher mobilities particularly at low temperatures. We found very similar overall response among the non-annealed samples, as well as among the annealed ones.

Bottom Line: Here, we present a temperature (T) dependent comparison between field-effect and Hall mobilities in field-effect transistors based on few-layered WSe2 exfoliated onto SiO2.The hole Hall mobility reaches a maximum value of 650 cm(2)/Vs as T is lowered below ~150 K, indicating that insofar WSe2-based field-effect transistors (FETs) display the largest Hall mobilities among the transition metal dichalcogenides.The gate capacitance, as extracted from the Hall-effect, reveals the presence of spurious charges in the channel, while the two-terminal sheet resistivity displays two-dimensional variable-range hopping behavior, indicating carrier localization induced by disorder at the interface between WSe2 and SiO2.

View Article: PubMed Central - PubMed

Affiliation: National High Magnetic Field Laboratory, Florida State University, Tallahassee-FL 32310, USA.

ABSTRACT
Here, we present a temperature (T) dependent comparison between field-effect and Hall mobilities in field-effect transistors based on few-layered WSe2 exfoliated onto SiO2. Without dielectric engineering and beyond a T-dependent threshold gate-voltage, we observe maximum hole mobilities approaching 350 cm(2)/Vs at T = 300 K. The hole Hall mobility reaches a maximum value of 650 cm(2)/Vs as T is lowered below ~150 K, indicating that insofar WSe2-based field-effect transistors (FETs) display the largest Hall mobilities among the transition metal dichalcogenides. The gate capacitance, as extracted from the Hall-effect, reveals the presence of spurious charges in the channel, while the two-terminal sheet resistivity displays two-dimensional variable-range hopping behavior, indicating carrier localization induced by disorder at the interface between WSe2 and SiO2. We argue that improvements in the fabrication protocols as, for example, the use of a substrate free of dangling bonds are likely to produce WSe2-based FETs displaying higher room temperature mobilities, i.e. approaching those of p-doped Si, which would make it a suitable candidate for high performance opto-electronics.

No MeSH data available.


Related in: MedlinePlus