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A single poly-Si gate-all-around junctionless fin field-effect transistor for use in one-time programming nonvolatile memory.

Yeh MS, Wu YC, Liu KC, Chung MH, Jhan YR, Hung MF, Chen LC - Nanoscale Res Lett (2014)

Bottom Line: This work demonstrates a feasible single poly-Si gate-all-around (GAA) junctionless fin field-effect transistor (JL-FinFET) for use in one-time programming (OTP) nonvolatile memory (NVM) applications.By extrapolation, 95% of the original charge can be stored for 10 years.In the future, this device will be applied to multi-layer Si ICs in fully functional systems on panels, active-matrix liquid-crystal displays, and three-dimensional (3D) stacked flash memory.

View Article: PubMed Central - HTML - PubMed

Affiliation: Department of Engineering and System Science, National Tsing Hua University, 101, Section 2, Kuang Fu Road, Hsinchu 30013, Taiwan.

ABSTRACT
This work demonstrates a feasible single poly-Si gate-all-around (GAA) junctionless fin field-effect transistor (JL-FinFET) for use in one-time programming (OTP) nonvolatile memory (NVM) applications. The advantages of this device include the simplicity of its use and the ease with which it can be embedded in Si wafer, glass, and flexible substrates. This device exhibits excellent retention, with a memory window maintained 2 V after 10(4) s. By extrapolation, 95% of the original charge can be stored for 10 years. In the future, this device will be applied to multi-layer Si ICs in fully functional systems on panels, active-matrix liquid-crystal displays, and three-dimensional (3D) stacked flash memory.

No MeSH data available.


Related in: MedlinePlus

Programming speed characteristics of the single poly-Si JL-FinFET NVM. Program speed characteristic of (a) JL-FinFET with GAA-NWs and (b) JL-FinFET with planar structures, respectively.
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Figure 4: Programming speed characteristics of the single poly-Si JL-FinFET NVM. Program speed characteristic of (a) JL-FinFET with GAA-NWs and (b) JL-FinFET with planar structures, respectively.

Mentions: Figure 2a shows the top-view scanning electron microscopic (SEM) image of the active region of a single poly-Si JL-FinFET GAA NVM with gate length (Lg) = 0.1 μm. Figure 2b presents a cross-sectional transmission electron microscopy (TEM) image of a single poly-Si JL-FinFET NVM with GAA-NWs. Figure 2c,d shows the effective channel width is 200 nm × 10 [(93 nm × 2 + 7 nm × 2) × 10)]. The oxide/nitride layers are designed to be 4.5 nm thick/7.3 nm thick as well as the entire device.To operate the memory, the device is programmed by Fowler-Nordheim (F-N) tunneling by applying 17 V, as presented in Figure 3. The memory window is opened to 5.2 V for 1 s. This device cannot be erased when a negative bias is applied, perhaps because of the high carrier density in the channel and the fact that the channel does not have sufficient holes to be able to erase. Figure 4a,b displays the programming speeds of the device GAA-NW and the planar device, respectively. The GAA-NW device has a higher programming speed than the planar device because of the field enhancement effect at corners of the oxide layer.


A single poly-Si gate-all-around junctionless fin field-effect transistor for use in one-time programming nonvolatile memory.

Yeh MS, Wu YC, Liu KC, Chung MH, Jhan YR, Hung MF, Chen LC - Nanoscale Res Lett (2014)

Programming speed characteristics of the single poly-Si JL-FinFET NVM. Program speed characteristic of (a) JL-FinFET with GAA-NWs and (b) JL-FinFET with planar structures, respectively.
© Copyright Policy - open-access
Related In: Results  -  Collection

License
Show All Figures
getmorefigures.php?uid=PMC4232527&req=5

Figure 4: Programming speed characteristics of the single poly-Si JL-FinFET NVM. Program speed characteristic of (a) JL-FinFET with GAA-NWs and (b) JL-FinFET with planar structures, respectively.
Mentions: Figure 2a shows the top-view scanning electron microscopic (SEM) image of the active region of a single poly-Si JL-FinFET GAA NVM with gate length (Lg) = 0.1 μm. Figure 2b presents a cross-sectional transmission electron microscopy (TEM) image of a single poly-Si JL-FinFET NVM with GAA-NWs. Figure 2c,d shows the effective channel width is 200 nm × 10 [(93 nm × 2 + 7 nm × 2) × 10)]. The oxide/nitride layers are designed to be 4.5 nm thick/7.3 nm thick as well as the entire device.To operate the memory, the device is programmed by Fowler-Nordheim (F-N) tunneling by applying 17 V, as presented in Figure 3. The memory window is opened to 5.2 V for 1 s. This device cannot be erased when a negative bias is applied, perhaps because of the high carrier density in the channel and the fact that the channel does not have sufficient holes to be able to erase. Figure 4a,b displays the programming speeds of the device GAA-NW and the planar device, respectively. The GAA-NW device has a higher programming speed than the planar device because of the field enhancement effect at corners of the oxide layer.

Bottom Line: This work demonstrates a feasible single poly-Si gate-all-around (GAA) junctionless fin field-effect transistor (JL-FinFET) for use in one-time programming (OTP) nonvolatile memory (NVM) applications.By extrapolation, 95% of the original charge can be stored for 10 years.In the future, this device will be applied to multi-layer Si ICs in fully functional systems on panels, active-matrix liquid-crystal displays, and three-dimensional (3D) stacked flash memory.

View Article: PubMed Central - HTML - PubMed

Affiliation: Department of Engineering and System Science, National Tsing Hua University, 101, Section 2, Kuang Fu Road, Hsinchu 30013, Taiwan.

ABSTRACT
This work demonstrates a feasible single poly-Si gate-all-around (GAA) junctionless fin field-effect transistor (JL-FinFET) for use in one-time programming (OTP) nonvolatile memory (NVM) applications. The advantages of this device include the simplicity of its use and the ease with which it can be embedded in Si wafer, glass, and flexible substrates. This device exhibits excellent retention, with a memory window maintained 2 V after 10(4) s. By extrapolation, 95% of the original charge can be stored for 10 years. In the future, this device will be applied to multi-layer Si ICs in fully functional systems on panels, active-matrix liquid-crystal displays, and three-dimensional (3D) stacked flash memory.

No MeSH data available.


Related in: MedlinePlus