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Quasi-linear vacancy dynamics modeling and circuit analysis of the bipolar memristor.

Abraham I - PLoS ONE (2014)

Bottom Line: The model is shown to comply with Chua's generalized equations for the memristor.Independent experimental results are used throughout, to validate the insights obtained from the model.The paper concludes by implementing a memristor-capacitor filter and compares its performance to a reference resistor-capacitor filter to demonstrate that the model is usable for practical circuit analysis.

View Article: PubMed Central - PubMed

Affiliation: Cloud Platform Group, Intel Corporation, Dupont, Washington, United States of America; and Department of Electrical Engineering, University of Washington, Seattle, Washington, United States of America.

ABSTRACT
The quasi-linear transport equation is investigated for modeling the bipolar memory resistor. The solution accommodates vacancy and circuit level perspectives on memristance. For the first time in literature the component resistors that constitute the contemporary dual variable resistor circuit model are quantified using vacancy parameters and derived from a governing partial differential equation. The model describes known memristor dynamics even as it generates new insight about vacancy migration, bottlenecks to switching speed and elucidates subtle relationships between switching resistance range and device parameters. The model is shown to comply with Chua's generalized equations for the memristor. Independent experimental results are used throughout, to validate the insights obtained from the model. The paper concludes by implementing a memristor-capacitor filter and compares its performance to a reference resistor-capacitor filter to demonstrate that the model is usable for practical circuit analysis.

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Vacancy velocity within the memristor.(a) Vacancy velocity is negative close to the left end plate at  signifying evacuation of vacancies. (b) Even at , the vacancies are evacuating the location because the device was originally initialized to a low resistance and the accumulation boundary materializes past the  position. (c) Shows an intermediate location  which initially experiences an inrush of vacancies (with positive velocity) and then loses vacancies (with negative velocity) as the accumulation boundary transits the location. (d) A location very close to the right end plate always accumulates vacancies. The velocity in all panels asymptotically approach zero with time.
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pone-0111607-g002: Vacancy velocity within the memristor.(a) Vacancy velocity is negative close to the left end plate at signifying evacuation of vacancies. (b) Even at , the vacancies are evacuating the location because the device was originally initialized to a low resistance and the accumulation boundary materializes past the position. (c) Shows an intermediate location which initially experiences an inrush of vacancies (with positive velocity) and then loses vacancies (with negative velocity) as the accumulation boundary transits the location. (d) A location very close to the right end plate always accumulates vacancies. The velocity in all panels asymptotically approach zero with time.

Mentions: This method of solving for produces a computable formula for velocity since it is not possible to enforce the velocity of vacancies inside the device. Fig. 2 plots (4) at various locations, for . Negative velocity indicates dissipation of vacancies while positive velocity indicates accumulation. Fig. 2(a) and Fig. 2(d) show dissipation and accumulation at very close to the left and right end plates respectively. Fig. 2(b) shows dissipating vacancies because the device has been initialized to its lowest resistance state with the accumulation boundary at infinity as in Fig. 1(c) and the only possible outcome when vacancies drift to the right, is for the location n = 0.4 to lose vacancies. In Fig. 2(c) the normalized location n = 0.6 exhibits an initial gain of vacancies with positive velocity when vacancies from the left side rush in. As the accumulation boundary transits through this point, the velocity becomes negative (representing outflow), reaches a negative maximum, and asymptotically tends to zero as time increases.


Quasi-linear vacancy dynamics modeling and circuit analysis of the bipolar memristor.

Abraham I - PLoS ONE (2014)

Vacancy velocity within the memristor.(a) Vacancy velocity is negative close to the left end plate at  signifying evacuation of vacancies. (b) Even at , the vacancies are evacuating the location because the device was originally initialized to a low resistance and the accumulation boundary materializes past the  position. (c) Shows an intermediate location  which initially experiences an inrush of vacancies (with positive velocity) and then loses vacancies (with negative velocity) as the accumulation boundary transits the location. (d) A location very close to the right end plate always accumulates vacancies. The velocity in all panels asymptotically approach zero with time.
© Copyright Policy
Related In: Results  -  Collection

License
Show All Figures
getmorefigures.php?uid=PMC4229088&req=5

pone-0111607-g002: Vacancy velocity within the memristor.(a) Vacancy velocity is negative close to the left end plate at signifying evacuation of vacancies. (b) Even at , the vacancies are evacuating the location because the device was originally initialized to a low resistance and the accumulation boundary materializes past the position. (c) Shows an intermediate location which initially experiences an inrush of vacancies (with positive velocity) and then loses vacancies (with negative velocity) as the accumulation boundary transits the location. (d) A location very close to the right end plate always accumulates vacancies. The velocity in all panels asymptotically approach zero with time.
Mentions: This method of solving for produces a computable formula for velocity since it is not possible to enforce the velocity of vacancies inside the device. Fig. 2 plots (4) at various locations, for . Negative velocity indicates dissipation of vacancies while positive velocity indicates accumulation. Fig. 2(a) and Fig. 2(d) show dissipation and accumulation at very close to the left and right end plates respectively. Fig. 2(b) shows dissipating vacancies because the device has been initialized to its lowest resistance state with the accumulation boundary at infinity as in Fig. 1(c) and the only possible outcome when vacancies drift to the right, is for the location n = 0.4 to lose vacancies. In Fig. 2(c) the normalized location n = 0.6 exhibits an initial gain of vacancies with positive velocity when vacancies from the left side rush in. As the accumulation boundary transits through this point, the velocity becomes negative (representing outflow), reaches a negative maximum, and asymptotically tends to zero as time increases.

Bottom Line: The model is shown to comply with Chua's generalized equations for the memristor.Independent experimental results are used throughout, to validate the insights obtained from the model.The paper concludes by implementing a memristor-capacitor filter and compares its performance to a reference resistor-capacitor filter to demonstrate that the model is usable for practical circuit analysis.

View Article: PubMed Central - PubMed

Affiliation: Cloud Platform Group, Intel Corporation, Dupont, Washington, United States of America; and Department of Electrical Engineering, University of Washington, Seattle, Washington, United States of America.

ABSTRACT
The quasi-linear transport equation is investigated for modeling the bipolar memory resistor. The solution accommodates vacancy and circuit level perspectives on memristance. For the first time in literature the component resistors that constitute the contemporary dual variable resistor circuit model are quantified using vacancy parameters and derived from a governing partial differential equation. The model describes known memristor dynamics even as it generates new insight about vacancy migration, bottlenecks to switching speed and elucidates subtle relationships between switching resistance range and device parameters. The model is shown to comply with Chua's generalized equations for the memristor. Independent experimental results are used throughout, to validate the insights obtained from the model. The paper concludes by implementing a memristor-capacitor filter and compares its performance to a reference resistor-capacitor filter to demonstrate that the model is usable for practical circuit analysis.

Show MeSH