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Graph-based symbolic technique and its application in the frequency response bound analysis of analog integrated circuits.

Tlelo-Cuautle E, Rodriguez-Chavez S, Palma-Rodriguez AA - ScientificWorldJournal (2014)

Bottom Line: The derived H(s) of a given analog IC is used to compute the frequency response bounds (maximum and minimum) associated to the magnitude and phase of H(s), subject to some ranges of process variational parameters, and by performing nonlinear constrained optimization.Our simulations demonstrate the usefulness of the new GBST for deriving the exact symbolic expression for H(s), and the last section highlights the good agreement between the frequency response bounds computed by our variational analysis approach versus traditional Monte Carlo simulations.As a conclusion, performing variational analysis using our proposed GBST for computing the frequency response bounds of analog ICs, shows a gain in computing time of 100x for a differential circuit topology and 50x for a 3-stage amplifier, compared to traditional Monte Carlo simulations.

View Article: PubMed Central - PubMed

Affiliation: INAOE, 72840 Tonantzintla, Puebla, PUE, Mexico.

ABSTRACT
A new graph-based symbolic technique (GBST) for deriving exact analytical expressions like the transfer function H(s) of an analog integrated circuit (IC), is introduced herein. The derived H(s) of a given analog IC is used to compute the frequency response bounds (maximum and minimum) associated to the magnitude and phase of H(s), subject to some ranges of process variational parameters, and by performing nonlinear constrained optimization. Our simulations demonstrate the usefulness of the new GBST for deriving the exact symbolic expression for H(s), and the last section highlights the good agreement between the frequency response bounds computed by our variational analysis approach versus traditional Monte Carlo simulations. As a conclusion, performing variational analysis using our proposed GBST for computing the frequency response bounds of analog ICs, shows a gain in computing time of 100x for a differential circuit topology and 50x for a 3-stage amplifier, compared to traditional Monte Carlo simulations.

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Bounds for the 3-stage OTA applying (a) PGRAD and (b) SPG.
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fig11: Bounds for the 3-stage OTA applying (a) PGRAD and (b) SPG.

Mentions: Both the PGRAD and SPG methods were programmed in C and compiled in an Ubuntu Linux environment with the GNU C compiler gcc-4.6.1, with 4 GB RAM in an Intel Core i3. The performance bounds results for the differential pair are shown in Figure 10 and for the 3-stage OTA in Figure 11. The lines in blue are those corresponding to Monte Carlo simulations, which are well bounded by the bounds computed by the variational methods PGRAD and SPG. Table 2 summarizes the results where it can be appreciated that both variational methods show better times than by performing repeated Monte Carlo simulations when using HSPICE.


Graph-based symbolic technique and its application in the frequency response bound analysis of analog integrated circuits.

Tlelo-Cuautle E, Rodriguez-Chavez S, Palma-Rodriguez AA - ScientificWorldJournal (2014)

Bounds for the 3-stage OTA applying (a) PGRAD and (b) SPG.
© Copyright Policy - open-access
Related In: Results  -  Collection

Show All Figures
getmorefigures.php?uid=PMC4127259&req=5

fig11: Bounds for the 3-stage OTA applying (a) PGRAD and (b) SPG.
Mentions: Both the PGRAD and SPG methods were programmed in C and compiled in an Ubuntu Linux environment with the GNU C compiler gcc-4.6.1, with 4 GB RAM in an Intel Core i3. The performance bounds results for the differential pair are shown in Figure 10 and for the 3-stage OTA in Figure 11. The lines in blue are those corresponding to Monte Carlo simulations, which are well bounded by the bounds computed by the variational methods PGRAD and SPG. Table 2 summarizes the results where it can be appreciated that both variational methods show better times than by performing repeated Monte Carlo simulations when using HSPICE.

Bottom Line: The derived H(s) of a given analog IC is used to compute the frequency response bounds (maximum and minimum) associated to the magnitude and phase of H(s), subject to some ranges of process variational parameters, and by performing nonlinear constrained optimization.Our simulations demonstrate the usefulness of the new GBST for deriving the exact symbolic expression for H(s), and the last section highlights the good agreement between the frequency response bounds computed by our variational analysis approach versus traditional Monte Carlo simulations.As a conclusion, performing variational analysis using our proposed GBST for computing the frequency response bounds of analog ICs, shows a gain in computing time of 100x for a differential circuit topology and 50x for a 3-stage amplifier, compared to traditional Monte Carlo simulations.

View Article: PubMed Central - PubMed

Affiliation: INAOE, 72840 Tonantzintla, Puebla, PUE, Mexico.

ABSTRACT
A new graph-based symbolic technique (GBST) for deriving exact analytical expressions like the transfer function H(s) of an analog integrated circuit (IC), is introduced herein. The derived H(s) of a given analog IC is used to compute the frequency response bounds (maximum and minimum) associated to the magnitude and phase of H(s), subject to some ranges of process variational parameters, and by performing nonlinear constrained optimization. Our simulations demonstrate the usefulness of the new GBST for deriving the exact symbolic expression for H(s), and the last section highlights the good agreement between the frequency response bounds computed by our variational analysis approach versus traditional Monte Carlo simulations. As a conclusion, performing variational analysis using our proposed GBST for computing the frequency response bounds of analog ICs, shows a gain in computing time of 100x for a differential circuit topology and 50x for a 3-stage amplifier, compared to traditional Monte Carlo simulations.

Show MeSH