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Graph-based symbolic technique and its application in the frequency response bound analysis of analog integrated circuits.

Tlelo-Cuautle E, Rodriguez-Chavez S, Palma-Rodriguez AA - ScientificWorldJournal (2014)

Bottom Line: The derived H(s) of a given analog IC is used to compute the frequency response bounds (maximum and minimum) associated to the magnitude and phase of H(s), subject to some ranges of process variational parameters, and by performing nonlinear constrained optimization.Our simulations demonstrate the usefulness of the new GBST for deriving the exact symbolic expression for H(s), and the last section highlights the good agreement between the frequency response bounds computed by our variational analysis approach versus traditional Monte Carlo simulations.As a conclusion, performing variational analysis using our proposed GBST for computing the frequency response bounds of analog ICs, shows a gain in computing time of 100x for a differential circuit topology and 50x for a 3-stage amplifier, compared to traditional Monte Carlo simulations.

View Article: PubMed Central - PubMed

Affiliation: INAOE, 72840 Tonantzintla, Puebla, PUE, Mexico.

ABSTRACT
A new graph-based symbolic technique (GBST) for deriving exact analytical expressions like the transfer function H(s) of an analog integrated circuit (IC), is introduced herein. The derived H(s) of a given analog IC is used to compute the frequency response bounds (maximum and minimum) associated to the magnitude and phase of H(s), subject to some ranges of process variational parameters, and by performing nonlinear constrained optimization. Our simulations demonstrate the usefulness of the new GBST for deriving the exact symbolic expression for H(s), and the last section highlights the good agreement between the frequency response bounds computed by our variational analysis approach versus traditional Monte Carlo simulations. As a conclusion, performing variational analysis using our proposed GBST for computing the frequency response bounds of analog ICs, shows a gain in computing time of 100x for a differential circuit topology and 50x for a 3-stage amplifier, compared to traditional Monte Carlo simulations.

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Frequency response of the RLC circuit [3]. Solid curve is the magnitude response with nominal parameters. The dashed curves are the lower and upper bounds due to variations. The three surfaces at the top have L and C as x-axis and y-axis, respectively, and z-axis shows the magnitude variations at three sampling frequencies.
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fig7: Frequency response of the RLC circuit [3]. Solid curve is the magnitude response with nominal parameters. The dashed curves are the lower and upper bounds due to variations. The three surfaces at the top have L and C as x-axis and y-axis, respectively, and z-axis shows the magnitude variations at three sampling frequencies.

Mentions: Assuming that C and L have variations of 20% from their nominal values C = 1 μF and L = 1 μH, then C ∈ [0.8,1.2]  μF and L ∈ [0.8,1.2]  μH. For this example, the iterative method called active set was used. As a result, three snapshots at different frequency points are shown in Figure 7.


Graph-based symbolic technique and its application in the frequency response bound analysis of analog integrated circuits.

Tlelo-Cuautle E, Rodriguez-Chavez S, Palma-Rodriguez AA - ScientificWorldJournal (2014)

Frequency response of the RLC circuit [3]. Solid curve is the magnitude response with nominal parameters. The dashed curves are the lower and upper bounds due to variations. The three surfaces at the top have L and C as x-axis and y-axis, respectively, and z-axis shows the magnitude variations at three sampling frequencies.
© Copyright Policy - open-access
Related In: Results  -  Collection

Show All Figures
getmorefigures.php?uid=PMC4127259&req=5

fig7: Frequency response of the RLC circuit [3]. Solid curve is the magnitude response with nominal parameters. The dashed curves are the lower and upper bounds due to variations. The three surfaces at the top have L and C as x-axis and y-axis, respectively, and z-axis shows the magnitude variations at three sampling frequencies.
Mentions: Assuming that C and L have variations of 20% from their nominal values C = 1 μF and L = 1 μH, then C ∈ [0.8,1.2]  μF and L ∈ [0.8,1.2]  μH. For this example, the iterative method called active set was used. As a result, three snapshots at different frequency points are shown in Figure 7.

Bottom Line: The derived H(s) of a given analog IC is used to compute the frequency response bounds (maximum and minimum) associated to the magnitude and phase of H(s), subject to some ranges of process variational parameters, and by performing nonlinear constrained optimization.Our simulations demonstrate the usefulness of the new GBST for deriving the exact symbolic expression for H(s), and the last section highlights the good agreement between the frequency response bounds computed by our variational analysis approach versus traditional Monte Carlo simulations.As a conclusion, performing variational analysis using our proposed GBST for computing the frequency response bounds of analog ICs, shows a gain in computing time of 100x for a differential circuit topology and 50x for a 3-stage amplifier, compared to traditional Monte Carlo simulations.

View Article: PubMed Central - PubMed

Affiliation: INAOE, 72840 Tonantzintla, Puebla, PUE, Mexico.

ABSTRACT
A new graph-based symbolic technique (GBST) for deriving exact analytical expressions like the transfer function H(s) of an analog integrated circuit (IC), is introduced herein. The derived H(s) of a given analog IC is used to compute the frequency response bounds (maximum and minimum) associated to the magnitude and phase of H(s), subject to some ranges of process variational parameters, and by performing nonlinear constrained optimization. Our simulations demonstrate the usefulness of the new GBST for deriving the exact symbolic expression for H(s), and the last section highlights the good agreement between the frequency response bounds computed by our variational analysis approach versus traditional Monte Carlo simulations. As a conclusion, performing variational analysis using our proposed GBST for computing the frequency response bounds of analog ICs, shows a gain in computing time of 100x for a differential circuit topology and 50x for a 3-stage amplifier, compared to traditional Monte Carlo simulations.

Show MeSH