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Graph-based symbolic technique and its application in the frequency response bound analysis of analog integrated circuits.

Tlelo-Cuautle E, Rodriguez-Chavez S, Palma-Rodriguez AA - ScientificWorldJournal (2014)

Bottom Line: The derived H(s) of a given analog IC is used to compute the frequency response bounds (maximum and minimum) associated to the magnitude and phase of H(s), subject to some ranges of process variational parameters, and by performing nonlinear constrained optimization.Our simulations demonstrate the usefulness of the new GBST for deriving the exact symbolic expression for H(s), and the last section highlights the good agreement between the frequency response bounds computed by our variational analysis approach versus traditional Monte Carlo simulations.As a conclusion, performing variational analysis using our proposed GBST for computing the frequency response bounds of analog ICs, shows a gain in computing time of 100x for a differential circuit topology and 50x for a 3-stage amplifier, compared to traditional Monte Carlo simulations.

View Article: PubMed Central - PubMed

Affiliation: INAOE, 72840 Tonantzintla, Puebla, PUE, Mexico.

ABSTRACT
A new graph-based symbolic technique (GBST) for deriving exact analytical expressions like the transfer function H(s) of an analog integrated circuit (IC), is introduced herein. The derived H(s) of a given analog IC is used to compute the frequency response bounds (maximum and minimum) associated to the magnitude and phase of H(s), subject to some ranges of process variational parameters, and by performing nonlinear constrained optimization. Our simulations demonstrate the usefulness of the new GBST for deriving the exact symbolic expression for H(s), and the last section highlights the good agreement between the frequency response bounds computed by our variational analysis approach versus traditional Monte Carlo simulations. As a conclusion, performing variational analysis using our proposed GBST for computing the frequency response bounds of analog ICs, shows a gain in computing time of 100x for a differential circuit topology and 50x for a 3-stage amplifier, compared to traditional Monte Carlo simulations.

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H(s) comparison among DDD [3] (dashed), HSPICE (dots), and our graph-based symbolic technique (solid) for the differential pair topology.
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fig4: H(s) comparison among DDD [3] (dashed), HSPICE (dots), and our graph-based symbolic technique (solid) for the differential pair topology.

Mentions: To demonstrate the suitability of the new graph-based symbolic technique (GBST), we performed a comparison with HSPICE and the DDD symbolic tool [3], as shown in Figure 4. As one sees, GBST is in good agreement with the numerical response computed by SPICE, while the DDD technique has an error around 10%. That way, GBST is applied herein to derive the exact analytical expression H(s) of CMOS amplifiers. The derived H(s) is used to perform variational analysis, in order to compute the frequency response bounds (maximum and minimum) of the magnitude and phase from H(s), subject to some ranges of process variational parameters by performing nonlinear constrained optimization.


Graph-based symbolic technique and its application in the frequency response bound analysis of analog integrated circuits.

Tlelo-Cuautle E, Rodriguez-Chavez S, Palma-Rodriguez AA - ScientificWorldJournal (2014)

H(s) comparison among DDD [3] (dashed), HSPICE (dots), and our graph-based symbolic technique (solid) for the differential pair topology.
© Copyright Policy - open-access
Related In: Results  -  Collection

Show All Figures
getmorefigures.php?uid=PMC4127259&req=5

fig4: H(s) comparison among DDD [3] (dashed), HSPICE (dots), and our graph-based symbolic technique (solid) for the differential pair topology.
Mentions: To demonstrate the suitability of the new graph-based symbolic technique (GBST), we performed a comparison with HSPICE and the DDD symbolic tool [3], as shown in Figure 4. As one sees, GBST is in good agreement with the numerical response computed by SPICE, while the DDD technique has an error around 10%. That way, GBST is applied herein to derive the exact analytical expression H(s) of CMOS amplifiers. The derived H(s) is used to perform variational analysis, in order to compute the frequency response bounds (maximum and minimum) of the magnitude and phase from H(s), subject to some ranges of process variational parameters by performing nonlinear constrained optimization.

Bottom Line: The derived H(s) of a given analog IC is used to compute the frequency response bounds (maximum and minimum) associated to the magnitude and phase of H(s), subject to some ranges of process variational parameters, and by performing nonlinear constrained optimization.Our simulations demonstrate the usefulness of the new GBST for deriving the exact symbolic expression for H(s), and the last section highlights the good agreement between the frequency response bounds computed by our variational analysis approach versus traditional Monte Carlo simulations.As a conclusion, performing variational analysis using our proposed GBST for computing the frequency response bounds of analog ICs, shows a gain in computing time of 100x for a differential circuit topology and 50x for a 3-stage amplifier, compared to traditional Monte Carlo simulations.

View Article: PubMed Central - PubMed

Affiliation: INAOE, 72840 Tonantzintla, Puebla, PUE, Mexico.

ABSTRACT
A new graph-based symbolic technique (GBST) for deriving exact analytical expressions like the transfer function H(s) of an analog integrated circuit (IC), is introduced herein. The derived H(s) of a given analog IC is used to compute the frequency response bounds (maximum and minimum) associated to the magnitude and phase of H(s), subject to some ranges of process variational parameters, and by performing nonlinear constrained optimization. Our simulations demonstrate the usefulness of the new GBST for deriving the exact symbolic expression for H(s), and the last section highlights the good agreement between the frequency response bounds computed by our variational analysis approach versus traditional Monte Carlo simulations. As a conclusion, performing variational analysis using our proposed GBST for computing the frequency response bounds of analog ICs, shows a gain in computing time of 100x for a differential circuit topology and 50x for a 3-stage amplifier, compared to traditional Monte Carlo simulations.

Show MeSH