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Graph-based symbolic technique and its application in the frequency response bound analysis of analog integrated circuits.

Tlelo-Cuautle E, Rodriguez-Chavez S, Palma-Rodriguez AA - ScientificWorldJournal (2014)

Bottom Line: The derived H(s) of a given analog IC is used to compute the frequency response bounds (maximum and minimum) associated to the magnitude and phase of H(s), subject to some ranges of process variational parameters, and by performing nonlinear constrained optimization.Our simulations demonstrate the usefulness of the new GBST for deriving the exact symbolic expression for H(s), and the last section highlights the good agreement between the frequency response bounds computed by our variational analysis approach versus traditional Monte Carlo simulations.As a conclusion, performing variational analysis using our proposed GBST for computing the frequency response bounds of analog ICs, shows a gain in computing time of 100x for a differential circuit topology and 50x for a 3-stage amplifier, compared to traditional Monte Carlo simulations.

View Article: PubMed Central - PubMed

Affiliation: INAOE, 72840 Tonantzintla, Puebla, PUE, Mexico.

ABSTRACT
A new graph-based symbolic technique (GBST) for deriving exact analytical expressions like the transfer function H(s) of an analog integrated circuit (IC), is introduced herein. The derived H(s) of a given analog IC is used to compute the frequency response bounds (maximum and minimum) associated to the magnitude and phase of H(s), subject to some ranges of process variational parameters, and by performing nonlinear constrained optimization. Our simulations demonstrate the usefulness of the new GBST for deriving the exact symbolic expression for H(s), and the last section highlights the good agreement between the frequency response bounds computed by our variational analysis approach versus traditional Monte Carlo simulations. As a conclusion, performing variational analysis using our proposed GBST for computing the frequency response bounds of analog ICs, shows a gain in computing time of 100x for a differential circuit topology and 50x for a 3-stage amplifier, compared to traditional Monte Carlo simulations.

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Graph representation of (1).
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fig1: Graph representation of (1).

Mentions: Let us consider the determinant given by (1) [9], of size n × n. By applying GBST, the graph representation is built in a depth-first search (DFS) fashion, while one expects having paths of n + 1 levels. Every element in the graph corresponds to a nonzero entry in M. In this manner, one obtains the graph shown in Figure 1, where applying the rule of signs from Cramer's rule (see (2)) does the assignation of signs to each node. A path is eliminated if a zero entry in the nodal admittance matrix is found. Consider(1)/M/=/ab00cde00fgh00ij/=adgj−adhi−aefj−bcgj+bchi,(2)sign⁡=(−1)row+col.


Graph-based symbolic technique and its application in the frequency response bound analysis of analog integrated circuits.

Tlelo-Cuautle E, Rodriguez-Chavez S, Palma-Rodriguez AA - ScientificWorldJournal (2014)

Graph representation of (1).
© Copyright Policy - open-access
Related In: Results  -  Collection

Show All Figures
getmorefigures.php?uid=PMC4127259&req=5

fig1: Graph representation of (1).
Mentions: Let us consider the determinant given by (1) [9], of size n × n. By applying GBST, the graph representation is built in a depth-first search (DFS) fashion, while one expects having paths of n + 1 levels. Every element in the graph corresponds to a nonzero entry in M. In this manner, one obtains the graph shown in Figure 1, where applying the rule of signs from Cramer's rule (see (2)) does the assignation of signs to each node. A path is eliminated if a zero entry in the nodal admittance matrix is found. Consider(1)/M/=/ab00cde00fgh00ij/=adgj−adhi−aefj−bcgj+bchi,(2)sign⁡=(−1)row+col.

Bottom Line: The derived H(s) of a given analog IC is used to compute the frequency response bounds (maximum and minimum) associated to the magnitude and phase of H(s), subject to some ranges of process variational parameters, and by performing nonlinear constrained optimization.Our simulations demonstrate the usefulness of the new GBST for deriving the exact symbolic expression for H(s), and the last section highlights the good agreement between the frequency response bounds computed by our variational analysis approach versus traditional Monte Carlo simulations.As a conclusion, performing variational analysis using our proposed GBST for computing the frequency response bounds of analog ICs, shows a gain in computing time of 100x for a differential circuit topology and 50x for a 3-stage amplifier, compared to traditional Monte Carlo simulations.

View Article: PubMed Central - PubMed

Affiliation: INAOE, 72840 Tonantzintla, Puebla, PUE, Mexico.

ABSTRACT
A new graph-based symbolic technique (GBST) for deriving exact analytical expressions like the transfer function H(s) of an analog integrated circuit (IC), is introduced herein. The derived H(s) of a given analog IC is used to compute the frequency response bounds (maximum and minimum) associated to the magnitude and phase of H(s), subject to some ranges of process variational parameters, and by performing nonlinear constrained optimization. Our simulations demonstrate the usefulness of the new GBST for deriving the exact symbolic expression for H(s), and the last section highlights the good agreement between the frequency response bounds computed by our variational analysis approach versus traditional Monte Carlo simulations. As a conclusion, performing variational analysis using our proposed GBST for computing the frequency response bounds of analog ICs, shows a gain in computing time of 100x for a differential circuit topology and 50x for a 3-stage amplifier, compared to traditional Monte Carlo simulations.

Show MeSH