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Low-voltage 96 dB snapshot CMOS image sensor with 4.5 nW power dissipation per pixel.

Spivak A, Teman A, Belenky A, Yadid-Pecht O, Fish A - Sensors (Basel) (2012)

Bottom Line: This sensor features several power reduction techniques, including a dual voltage supply, a selective power down, transistors with different threshold voltages, a non-rationed logic, and a low voltage static memory.The proposed power-saving solutions have allowed the maintenance of the standard architecture of the sensor, reducing both the time and the cost of the design.An SNR of 48 dB and DR of 96 dB were achieved with a power dissipation of 4.5 nW per pixel.

View Article: PubMed Central - PubMed

Affiliation: The VLSI Systems Center, LPCAS, Ben-Gurion University, P.O.B. 653, Be'er-Sheva 84105, Israel. spivakar@bgu.ac.il

ABSTRACT
Modern "smart" CMOS sensors have penetrated into various applications, such as surveillance systems, bio-medical applications, digital cameras, cellular phones and many others. Reducing the power of these sensors continuously challenges designers. In this paper, a low power global shutter CMOS image sensor with Wide Dynamic Range (WDR) ability is presented. This sensor features several power reduction techniques, including a dual voltage supply, a selective power down, transistors with different threshold voltages, a non-rationed logic, and a low voltage static memory. A combination of all these approaches has enabled the design of the low voltage "smart" image sensor, which is capable of reaching a remarkable dynamic range, while consuming very low power. The proposed power-saving solutions have allowed the maintenance of the standard architecture of the sensor, reducing both the time and the cost of the design. In order to maintain the image quality, a relation between the sensor performance and power has been analyzed and a mathematical model, describing the sensor Signal to Noise Ratio (SNR) and Dynamic Range (DR) as a function of the power supplies, is proposed. The described sensor was implemented in a 0.18 um CMOS process and successfully tested in the laboratory. An SNR of 48 dB and DR of 96 dB were achieved with a power dissipation of 4.5 nW per pixel.

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(a) SNR vs. AVDD vs. DVDD; (b) DR vs. AVDD vs. DVDD; (c) PPX vs. AVDD vs. DVDD; (d) Contour map.
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f7-sensors-12-10067: (a) SNR vs. AVDD vs. DVDD; (b) DR vs. AVDD vs. DVDD; (c) PPX vs. AVDD vs. DVDD; (d) Contour map.

Mentions: We conducted numerous measurements of the sensor performance, while changing its power supplies. The sensor's SNR and DR were measured from the captured image using PC software, while the power consumption was derived by relying on the measurements of the current flowing through the AVDD and DVDD ports. During these measurements we changed the supplies' values separately in order to make it possible to represent the measured SNR, DR and power as functions of both power supplies. At the end of the measurements, we arranged the obtained data into 3D plots (Figure 7(a–c)), which effectively demonstrated the dependence of the measured parameters vs. the sensor supplies.


Low-voltage 96 dB snapshot CMOS image sensor with 4.5 nW power dissipation per pixel.

Spivak A, Teman A, Belenky A, Yadid-Pecht O, Fish A - Sensors (Basel) (2012)

(a) SNR vs. AVDD vs. DVDD; (b) DR vs. AVDD vs. DVDD; (c) PPX vs. AVDD vs. DVDD; (d) Contour map.
© Copyright Policy
Related In: Results  -  Collection

License
Show All Figures
getmorefigures.php?uid=PMC3472816&req=5

f7-sensors-12-10067: (a) SNR vs. AVDD vs. DVDD; (b) DR vs. AVDD vs. DVDD; (c) PPX vs. AVDD vs. DVDD; (d) Contour map.
Mentions: We conducted numerous measurements of the sensor performance, while changing its power supplies. The sensor's SNR and DR were measured from the captured image using PC software, while the power consumption was derived by relying on the measurements of the current flowing through the AVDD and DVDD ports. During these measurements we changed the supplies' values separately in order to make it possible to represent the measured SNR, DR and power as functions of both power supplies. At the end of the measurements, we arranged the obtained data into 3D plots (Figure 7(a–c)), which effectively demonstrated the dependence of the measured parameters vs. the sensor supplies.

Bottom Line: This sensor features several power reduction techniques, including a dual voltage supply, a selective power down, transistors with different threshold voltages, a non-rationed logic, and a low voltage static memory.The proposed power-saving solutions have allowed the maintenance of the standard architecture of the sensor, reducing both the time and the cost of the design.An SNR of 48 dB and DR of 96 dB were achieved with a power dissipation of 4.5 nW per pixel.

View Article: PubMed Central - PubMed

Affiliation: The VLSI Systems Center, LPCAS, Ben-Gurion University, P.O.B. 653, Be'er-Sheva 84105, Israel. spivakar@bgu.ac.il

ABSTRACT
Modern "smart" CMOS sensors have penetrated into various applications, such as surveillance systems, bio-medical applications, digital cameras, cellular phones and many others. Reducing the power of these sensors continuously challenges designers. In this paper, a low power global shutter CMOS image sensor with Wide Dynamic Range (WDR) ability is presented. This sensor features several power reduction techniques, including a dual voltage supply, a selective power down, transistors with different threshold voltages, a non-rationed logic, and a low voltage static memory. A combination of all these approaches has enabled the design of the low voltage "smart" image sensor, which is capable of reaching a remarkable dynamic range, while consuming very low power. The proposed power-saving solutions have allowed the maintenance of the standard architecture of the sensor, reducing both the time and the cost of the design. In order to maintain the image quality, a relation between the sensor performance and power has been analyzed and a mathematical model, describing the sensor Signal to Noise Ratio (SNR) and Dynamic Range (DR) as a function of the power supplies, is proposed. The described sensor was implemented in a 0.18 um CMOS process and successfully tested in the laboratory. An SNR of 48 dB and DR of 96 dB were achieved with a power dissipation of 4.5 nW per pixel.

Show MeSH
Related in: MedlinePlus