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A voltage mode memristor bridge synaptic circuit with memristor emulators.

Sah MP, Yang C, Kim H, Chua L - Sensors (Basel) (2012)

Bottom Line: This study is an extension of the previous work advancing toward the circuit implementation where the architecture of the memristor bridge synapse is built with memristor emulator circuits.In addition, a simple neural network which performs both synaptic weighting and summation is built by combining memristor emulators-based synapses and differential amplifier circuits.The feasibility of the memristor bridge neural circuit is verified via SPICE simulations.

View Article: PubMed Central - PubMed

Affiliation: Division of Electronics and Information Engineering, Chonbuk National University, Jeonju 561-756, Korea. maheshwarsah@hotmail.com

ABSTRACT
A memristor bridge neural circuit which is able to perform signed synaptic weighting was proposed in our previous study, where the synaptic operation was verified via software simulation of the mathematical model of the HP memristor. This study is an extension of the previous work advancing toward the circuit implementation where the architecture of the memristor bridge synapse is built with memristor emulator circuits. In addition, a simple neural network which performs both synaptic weighting and summation is built by combining memristor emulators-based synapses and differential amplifier circuits. The feasibility of the memristor bridge neural circuit is verified via SPICE simulations.

No MeSH data available.


Variation of memristance and voltages (vA, vB) when positive and negative pulses are applied to the emulator-based memristor bridge synapse (a) positive and negative input voltage pulses; (b) memristance variations; (c) voltage variations at vA and vB.
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f9-sensors-12-03587: Variation of memristance and voltages (vA, vB) when positive and negative pulses are applied to the emulator-based memristor bridge synapse (a) positive and negative input voltage pulses; (b) memristance variations; (c) voltage variations at vA and vB.

Mentions: Simulations for the weight programming of the memristor emulator-based synaptic circuit as in Figure 6 have been conducted. The synaptic weights were programmed with ±1 V input pulses. Figure 9(b) and Figure 9(c) show the memristance variation and the voltage across each memristor in the memristor bridge circuit for a positive and negative wide pulse.


A voltage mode memristor bridge synaptic circuit with memristor emulators.

Sah MP, Yang C, Kim H, Chua L - Sensors (Basel) (2012)

Variation of memristance and voltages (vA, vB) when positive and negative pulses are applied to the emulator-based memristor bridge synapse (a) positive and negative input voltage pulses; (b) memristance variations; (c) voltage variations at vA and vB.
© Copyright Policy
Related In: Results  -  Collection

License
Show All Figures
getmorefigures.php?uid=PMC3376599&req=5

f9-sensors-12-03587: Variation of memristance and voltages (vA, vB) when positive and negative pulses are applied to the emulator-based memristor bridge synapse (a) positive and negative input voltage pulses; (b) memristance variations; (c) voltage variations at vA and vB.
Mentions: Simulations for the weight programming of the memristor emulator-based synaptic circuit as in Figure 6 have been conducted. The synaptic weights were programmed with ±1 V input pulses. Figure 9(b) and Figure 9(c) show the memristance variation and the voltage across each memristor in the memristor bridge circuit for a positive and negative wide pulse.

Bottom Line: This study is an extension of the previous work advancing toward the circuit implementation where the architecture of the memristor bridge synapse is built with memristor emulator circuits.In addition, a simple neural network which performs both synaptic weighting and summation is built by combining memristor emulators-based synapses and differential amplifier circuits.The feasibility of the memristor bridge neural circuit is verified via SPICE simulations.

View Article: PubMed Central - PubMed

Affiliation: Division of Electronics and Information Engineering, Chonbuk National University, Jeonju 561-756, Korea. maheshwarsah@hotmail.com

ABSTRACT
A memristor bridge neural circuit which is able to perform signed synaptic weighting was proposed in our previous study, where the synaptic operation was verified via software simulation of the mathematical model of the HP memristor. This study is an extension of the previous work advancing toward the circuit implementation where the architecture of the memristor bridge synapse is built with memristor emulator circuits. In addition, a simple neural network which performs both synaptic weighting and summation is built by combining memristor emulators-based synapses and differential amplifier circuits. The feasibility of the memristor bridge neural circuit is verified via SPICE simulations.

No MeSH data available.