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A voltage mode memristor bridge synaptic circuit with memristor emulators.

Sah MP, Yang C, Kim H, Chua L - Sensors (Basel) (2012)

Bottom Line: This study is an extension of the previous work advancing toward the circuit implementation where the architecture of the memristor bridge synapse is built with memristor emulator circuits.In addition, a simple neural network which performs both synaptic weighting and summation is built by combining memristor emulators-based synapses and differential amplifier circuits.The feasibility of the memristor bridge neural circuit is verified via SPICE simulations.

View Article: PubMed Central - PubMed

Affiliation: Division of Electronics and Information Engineering, Chonbuk National University, Jeonju 561-756, Korea. maheshwarsah@hotmail.com

ABSTRACT
A memristor bridge neural circuit which is able to perform signed synaptic weighting was proposed in our previous study, where the synaptic operation was verified via software simulation of the mathematical model of the HP memristor. This study is an extension of the previous work advancing toward the circuit implementation where the architecture of the memristor bridge synapse is built with memristor emulator circuits. In addition, a simple neural network which performs both synaptic weighting and summation is built by combining memristor emulators-based synapses and differential amplifier circuits. The feasibility of the memristor bridge neural circuit is verified via SPICE simulations.

No MeSH data available.


Neural circuit (a) Block diagram of single layer neural network (b) Memristor synapse-based neural circuit.
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f8-sensors-12-03587: Neural circuit (a) Block diagram of single layer neural network (b) Memristor synapse-based neural circuit.

Mentions: Figure 8(a) is a general single layered neural network. The circuit of the memristor synapse-based neuron using memristor bridge and differential amplifier is shown in Figure 8(b). The synaptic multiplications among input pulses and memristor-based weights are conducted in the multiple memristor bridge circuits and the results of the multiplications are summed by simply tying the output terminals in a neuron cell. The sum of the currents is then converted back into a voltage using the load circuit RL.


A voltage mode memristor bridge synaptic circuit with memristor emulators.

Sah MP, Yang C, Kim H, Chua L - Sensors (Basel) (2012)

Neural circuit (a) Block diagram of single layer neural network (b) Memristor synapse-based neural circuit.
© Copyright Policy
Related In: Results  -  Collection

License
Show All Figures
getmorefigures.php?uid=PMC3376599&req=5

f8-sensors-12-03587: Neural circuit (a) Block diagram of single layer neural network (b) Memristor synapse-based neural circuit.
Mentions: Figure 8(a) is a general single layered neural network. The circuit of the memristor synapse-based neuron using memristor bridge and differential amplifier is shown in Figure 8(b). The synaptic multiplications among input pulses and memristor-based weights are conducted in the multiple memristor bridge circuits and the results of the multiplications are summed by simply tying the output terminals in a neuron cell. The sum of the currents is then converted back into a voltage using the load circuit RL.

Bottom Line: This study is an extension of the previous work advancing toward the circuit implementation where the architecture of the memristor bridge synapse is built with memristor emulator circuits.In addition, a simple neural network which performs both synaptic weighting and summation is built by combining memristor emulators-based synapses and differential amplifier circuits.The feasibility of the memristor bridge neural circuit is verified via SPICE simulations.

View Article: PubMed Central - PubMed

Affiliation: Division of Electronics and Information Engineering, Chonbuk National University, Jeonju 561-756, Korea. maheshwarsah@hotmail.com

ABSTRACT
A memristor bridge neural circuit which is able to perform signed synaptic weighting was proposed in our previous study, where the synaptic operation was verified via software simulation of the mathematical model of the HP memristor. This study is an extension of the previous work advancing toward the circuit implementation where the architecture of the memristor bridge synapse is built with memristor emulator circuits. In addition, a simple neural network which performs both synaptic weighting and summation is built by combining memristor emulators-based synapses and differential amplifier circuits. The feasibility of the memristor bridge neural circuit is verified via SPICE simulations.

No MeSH data available.