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A voltage mode memristor bridge synaptic circuit with memristor emulators.

Sah MP, Yang C, Kim H, Chua L - Sensors (Basel) (2012)

Bottom Line: This study is an extension of the previous work advancing toward the circuit implementation where the architecture of the memristor bridge synapse is built with memristor emulator circuits.In addition, a simple neural network which performs both synaptic weighting and summation is built by combining memristor emulators-based synapses and differential amplifier circuits.The feasibility of the memristor bridge neural circuit is verified via SPICE simulations.

View Article: PubMed Central - PubMed

Affiliation: Division of Electronics and Information Engineering, Chonbuk National University, Jeonju 561-756, Korea. maheshwarsah@hotmail.com

ABSTRACT
A memristor bridge neural circuit which is able to perform signed synaptic weighting was proposed in our previous study, where the synaptic operation was verified via software simulation of the mathematical model of the HP memristor. This study is an extension of the previous work advancing toward the circuit implementation where the architecture of the memristor bridge synapse is built with memristor emulator circuits. In addition, a simple neural network which performs both synaptic weighting and summation is built by combining memristor emulators-based synapses and differential amplifier circuits. The feasibility of the memristor bridge neural circuit is verified via SPICE simulations.

No MeSH data available.


Operations of the memristor emulator-based neuron. Input signals sampled with doublet pulses from two different sinusoidal signals were applied to the memristor bridge synapses, (a) input voltage signal for ξ = −0.25; (b) input voltage signal for ξ = 0.1; (c) weighted voltage signals with ξ = −0.25; (d) weighted voltage signals with ξ = 0.1 and (e) weighted sum appeared at the output of the neuron.
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f12-sensors-12-03587: Operations of the memristor emulator-based neuron. Input signals sampled with doublet pulses from two different sinusoidal signals were applied to the memristor bridge synapses, (a) input voltage signal for ξ = −0.25; (b) input voltage signal for ξ = 0.1; (c) weighted voltage signals with ξ = −0.25; (d) weighted voltage signals with ξ = 0.1 and (e) weighted sum appeared at the output of the neuron.

Mentions: A single layer neuron with two input terminals as in Figure 8(a) has been built with the proposed memristor emulator-based synapse circuit. Two different kinds of sinusoidal voltage signals were sampled by doublet pulses and applied to the memristor synaptic circuits. Figure 12(a–e) are input voltage signals, weighted voltage signals of Figure 12(a,b) with weighting values of ξ = −0.25 and 0.1, and weighted sum appeared across RL where RL was 10 K.


A voltage mode memristor bridge synaptic circuit with memristor emulators.

Sah MP, Yang C, Kim H, Chua L - Sensors (Basel) (2012)

Operations of the memristor emulator-based neuron. Input signals sampled with doublet pulses from two different sinusoidal signals were applied to the memristor bridge synapses, (a) input voltage signal for ξ = −0.25; (b) input voltage signal for ξ = 0.1; (c) weighted voltage signals with ξ = −0.25; (d) weighted voltage signals with ξ = 0.1 and (e) weighted sum appeared at the output of the neuron.
© Copyright Policy
Related In: Results  -  Collection

License
Show All Figures
getmorefigures.php?uid=PMC3376599&req=5

f12-sensors-12-03587: Operations of the memristor emulator-based neuron. Input signals sampled with doublet pulses from two different sinusoidal signals were applied to the memristor bridge synapses, (a) input voltage signal for ξ = −0.25; (b) input voltage signal for ξ = 0.1; (c) weighted voltage signals with ξ = −0.25; (d) weighted voltage signals with ξ = 0.1 and (e) weighted sum appeared at the output of the neuron.
Mentions: A single layer neuron with two input terminals as in Figure 8(a) has been built with the proposed memristor emulator-based synapse circuit. Two different kinds of sinusoidal voltage signals were sampled by doublet pulses and applied to the memristor synaptic circuits. Figure 12(a–e) are input voltage signals, weighted voltage signals of Figure 12(a,b) with weighting values of ξ = −0.25 and 0.1, and weighted sum appeared across RL where RL was 10 K.

Bottom Line: This study is an extension of the previous work advancing toward the circuit implementation where the architecture of the memristor bridge synapse is built with memristor emulator circuits.In addition, a simple neural network which performs both synaptic weighting and summation is built by combining memristor emulators-based synapses and differential amplifier circuits.The feasibility of the memristor bridge neural circuit is verified via SPICE simulations.

View Article: PubMed Central - PubMed

Affiliation: Division of Electronics and Information Engineering, Chonbuk National University, Jeonju 561-756, Korea. maheshwarsah@hotmail.com

ABSTRACT
A memristor bridge neural circuit which is able to perform signed synaptic weighting was proposed in our previous study, where the synaptic operation was verified via software simulation of the mathematical model of the HP memristor. This study is an extension of the previous work advancing toward the circuit implementation where the architecture of the memristor bridge synapse is built with memristor emulator circuits. In addition, a simple neural network which performs both synaptic weighting and summation is built by combining memristor emulators-based synapses and differential amplifier circuits. The feasibility of the memristor bridge neural circuit is verified via SPICE simulations.

No MeSH data available.