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A voltage mode memristor bridge synaptic circuit with memristor emulators.

Sah MP, Yang C, Kim H, Chua L - Sensors (Basel) (2012)

Bottom Line: This study is an extension of the previous work advancing toward the circuit implementation where the architecture of the memristor bridge synapse is built with memristor emulator circuits.In addition, a simple neural network which performs both synaptic weighting and summation is built by combining memristor emulators-based synapses and differential amplifier circuits.The feasibility of the memristor bridge neural circuit is verified via SPICE simulations.

View Article: PubMed Central - PubMed

Affiliation: Division of Electronics and Information Engineering, Chonbuk National University, Jeonju 561-756, Korea. maheshwarsah@hotmail.com

ABSTRACT
A memristor bridge neural circuit which is able to perform signed synaptic weighting was proposed in our previous study, where the synaptic operation was verified via software simulation of the mathematical model of the HP memristor. This study is an extension of the previous work advancing toward the circuit implementation where the architecture of the memristor bridge synapse is built with memristor emulator circuits. In addition, a simple neural network which performs both synaptic weighting and summation is built by combining memristor emulators-based synapses and differential amplifier circuits. The feasibility of the memristor bridge neural circuit is verified via SPICE simulations.

No MeSH data available.


(a) Structure of TiO2 memristor, TiO2−x and TiO2 layers are sandwiched between two platinum electrodes. When a voltage/current is applied, its memristance (resistance of the memristor) is altered; (b) equivalent circuit and (c) symbol of the memristor.
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f1-sensors-12-03587: (a) Structure of TiO2 memristor, TiO2−x and TiO2 layers are sandwiched between two platinum electrodes. When a voltage/current is applied, its memristance (resistance of the memristor) is altered; (b) equivalent circuit and (c) symbol of the memristor.

Mentions: In HP TiO2 memristor model [17], an undoped region with highly resistive TiO2 and doped region with highly conductive oxygen vacancies TiO2−x layer are sandwiched between two platinum electrodes as shown in Figure 1(a). When a voltage or current signal is applied to the device, the border line between the doped and undoped layers shifts as a function of the applied voltage or current. In consequence, the resistance between the two electrodes is altered. Figure 1(b,c) is the equivalent circuit and the symbol whose polarity is indicated by a black bar at one end. The defined polarity indicates that the memristance is decreased (or increased) when current flows from the left (right) side to the right (left) side of the memristor symbol in Figure 1(c).


A voltage mode memristor bridge synaptic circuit with memristor emulators.

Sah MP, Yang C, Kim H, Chua L - Sensors (Basel) (2012)

(a) Structure of TiO2 memristor, TiO2−x and TiO2 layers are sandwiched between two platinum electrodes. When a voltage/current is applied, its memristance (resistance of the memristor) is altered; (b) equivalent circuit and (c) symbol of the memristor.
© Copyright Policy
Related In: Results  -  Collection

License
Show All Figures
getmorefigures.php?uid=PMC3376599&req=5

f1-sensors-12-03587: (a) Structure of TiO2 memristor, TiO2−x and TiO2 layers are sandwiched between two platinum electrodes. When a voltage/current is applied, its memristance (resistance of the memristor) is altered; (b) equivalent circuit and (c) symbol of the memristor.
Mentions: In HP TiO2 memristor model [17], an undoped region with highly resistive TiO2 and doped region with highly conductive oxygen vacancies TiO2−x layer are sandwiched between two platinum electrodes as shown in Figure 1(a). When a voltage or current signal is applied to the device, the border line between the doped and undoped layers shifts as a function of the applied voltage or current. In consequence, the resistance between the two electrodes is altered. Figure 1(b,c) is the equivalent circuit and the symbol whose polarity is indicated by a black bar at one end. The defined polarity indicates that the memristance is decreased (or increased) when current flows from the left (right) side to the right (left) side of the memristor symbol in Figure 1(c).

Bottom Line: This study is an extension of the previous work advancing toward the circuit implementation where the architecture of the memristor bridge synapse is built with memristor emulator circuits.In addition, a simple neural network which performs both synaptic weighting and summation is built by combining memristor emulators-based synapses and differential amplifier circuits.The feasibility of the memristor bridge neural circuit is verified via SPICE simulations.

View Article: PubMed Central - PubMed

Affiliation: Division of Electronics and Information Engineering, Chonbuk National University, Jeonju 561-756, Korea. maheshwarsah@hotmail.com

ABSTRACT
A memristor bridge neural circuit which is able to perform signed synaptic weighting was proposed in our previous study, where the synaptic operation was verified via software simulation of the mathematical model of the HP memristor. This study is an extension of the previous work advancing toward the circuit implementation where the architecture of the memristor bridge synapse is built with memristor emulator circuits. In addition, a simple neural network which performs both synaptic weighting and summation is built by combining memristor emulators-based synapses and differential amplifier circuits. The feasibility of the memristor bridge neural circuit is verified via SPICE simulations.

No MeSH data available.