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Reliable processing of graphene using metal etchmasks.

Kumar S, Peltekis N, Lee K, Kim HY, Duesberg GS - Nanoscale Res Lett (2011)

Bottom Line: We introduce a metal etch mask which minimises these problems.The high quality of graphene is shown by Raman and XPS spectroscopy as well as electrical measurements.The process is of high value for applications, as it improves the processability of graphene using high-throughput lithography and etching techniques.

View Article: PubMed Central - HTML - PubMed

Affiliation: School of Chemistry, Trinity College Dublin, Ireland. duesberg@tcd.ie.

ABSTRACT
Graphene exhibits exciting properties which make it an appealing candidate for use in electronic devices. Reliable processes for device fabrication are crucial prerequisites for this. We developed a large area of CVD synthesis and transfer of graphene films. With patterning of these graphene layers using standard photoresist masks, we are able to produce arrays of gated graphene devices with four point contacts. The etching and lift off process poses problems because of delamination and contamination due to polymer residues when using standard resists. We introduce a metal etch mask which minimises these problems. The high quality of graphene is shown by Raman and XPS spectroscopy as well as electrical measurements. The process is of high value for applications, as it improves the processability of graphene using high-throughput lithography and etching techniques.

No MeSH data available.


Graphene ribbons contacted from top on Al2O3 substrates with nickel contacts. The FET measurements were taken between two inner electrodes as source and drain, and substrate was gated from back. On the right, an Isd - Vg characteristic of the device is shown at Vsd of 50 mV.
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Figure 4: Graphene ribbons contacted from top on Al2O3 substrates with nickel contacts. The FET measurements were taken between two inner electrodes as source and drain, and substrate was gated from back. On the right, an Isd - Vg characteristic of the device is shown at Vsd of 50 mV.

Mentions: The optical image of an FET device is shown in Figure 4. The width of graphene ribbons is 4 μm, which is same as the distance between the electrodes. The transistor measurements were done between the two inner electrodes, and the gate voltage was applied from the backside of the substrate. An array of devices was studied, and transistor characteristics for one of them are shown in Figure 4 (right). The charge neutrality point for the device occurs at 18 V and indicates that graphene is p-doped, presumably due to acid treatment. The slope of graph near charge neutrality points can be used to estimate the field effect mobility [10]. Using the device dimensions of L = 4 μm, W = 16 μm, transconductance, gm = 2.5 μA/V (see Figure 4), source-drain voltage, Vsd = 50 mV, alumina dielectric constant εr = 9.34, its thickness h = 60 nm, and the formula, μFE = (hgm/ε0εr)L/WVsd, we get μFE ~ 90 cm2/(V s). This value does not match the high values obtained from the exfoliated graphene in transistor measurements [11], but to our knowledge, the obtained mobilities are close to the highest reported using CVD graphene on oxide substrates with standard lithographic processing [12]. However, these studies have to use e-beam lithography for contacting individual flakes, which is not a scalable process. Further, in our studies, we have used substrates without optimisation of the influence of underlying trapped charges and impurities. These might be crucial, as the graphene films undergo a liquid-based transfer process. We expect that a considerable improvement can be reached when those limiting factors are optimised.


Reliable processing of graphene using metal etchmasks.

Kumar S, Peltekis N, Lee K, Kim HY, Duesberg GS - Nanoscale Res Lett (2011)

Graphene ribbons contacted from top on Al2O3 substrates with nickel contacts. The FET measurements were taken between two inner electrodes as source and drain, and substrate was gated from back. On the right, an Isd - Vg characteristic of the device is shown at Vsd of 50 mV.
© Copyright Policy - open-access
Related In: Results  -  Collection

License
Show All Figures
getmorefigures.php?uid=PMC3211484&req=5

Figure 4: Graphene ribbons contacted from top on Al2O3 substrates with nickel contacts. The FET measurements were taken between two inner electrodes as source and drain, and substrate was gated from back. On the right, an Isd - Vg characteristic of the device is shown at Vsd of 50 mV.
Mentions: The optical image of an FET device is shown in Figure 4. The width of graphene ribbons is 4 μm, which is same as the distance between the electrodes. The transistor measurements were done between the two inner electrodes, and the gate voltage was applied from the backside of the substrate. An array of devices was studied, and transistor characteristics for one of them are shown in Figure 4 (right). The charge neutrality point for the device occurs at 18 V and indicates that graphene is p-doped, presumably due to acid treatment. The slope of graph near charge neutrality points can be used to estimate the field effect mobility [10]. Using the device dimensions of L = 4 μm, W = 16 μm, transconductance, gm = 2.5 μA/V (see Figure 4), source-drain voltage, Vsd = 50 mV, alumina dielectric constant εr = 9.34, its thickness h = 60 nm, and the formula, μFE = (hgm/ε0εr)L/WVsd, we get μFE ~ 90 cm2/(V s). This value does not match the high values obtained from the exfoliated graphene in transistor measurements [11], but to our knowledge, the obtained mobilities are close to the highest reported using CVD graphene on oxide substrates with standard lithographic processing [12]. However, these studies have to use e-beam lithography for contacting individual flakes, which is not a scalable process. Further, in our studies, we have used substrates without optimisation of the influence of underlying trapped charges and impurities. These might be crucial, as the graphene films undergo a liquid-based transfer process. We expect that a considerable improvement can be reached when those limiting factors are optimised.

Bottom Line: We introduce a metal etch mask which minimises these problems.The high quality of graphene is shown by Raman and XPS spectroscopy as well as electrical measurements.The process is of high value for applications, as it improves the processability of graphene using high-throughput lithography and etching techniques.

View Article: PubMed Central - HTML - PubMed

Affiliation: School of Chemistry, Trinity College Dublin, Ireland. duesberg@tcd.ie.

ABSTRACT
Graphene exhibits exciting properties which make it an appealing candidate for use in electronic devices. Reliable processes for device fabrication are crucial prerequisites for this. We developed a large area of CVD synthesis and transfer of graphene films. With patterning of these graphene layers using standard photoresist masks, we are able to produce arrays of gated graphene devices with four point contacts. The etching and lift off process poses problems because of delamination and contamination due to polymer residues when using standard resists. We introduce a metal etch mask which minimises these problems. The high quality of graphene is shown by Raman and XPS spectroscopy as well as electrical measurements. The process is of high value for applications, as it improves the processability of graphene using high-throughput lithography and etching techniques.

No MeSH data available.