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Thermal conductivity and thermal boundary resistance of nanostructures.

Termentzidis K, Parasuraman J, Da Cruz CA, Merabia S, Angelescu D, Marty F, Bourouina T, Kleber X, Chantrenne P, Basset P - Nanoscale Res Lett (2011)

Bottom Line: The influence of the interfacial roughness on the thermal conductivity of semiconductor/semiconductor superlattices was studied by equilibrium and non-equilibrium molecular dynamics and on the Kapitza resistance of superlattice's interfaces by equilibrium molecular dynamics.Physical explanations are provided for rationalizing the simulation results.PACS: 68.65.Cd, 66.70.Df, 81.16.-c, 65.80.-g, 31.12.xv.

View Article: PubMed Central - HTML - PubMed

Affiliation: INSA Lyon, CETHIL UMR5008, F-69621 Villeurbanne, France. konstantinos.termentzidis@gmail.com.

ABSTRACT
: We present a fabrication process of low-cost superlattices and simulations related with the heat dissipation on them. The influence of the interfacial roughness on the thermal conductivity of semiconductor/semiconductor superlattices was studied by equilibrium and non-equilibrium molecular dynamics and on the Kapitza resistance of superlattice's interfaces by equilibrium molecular dynamics. The non-equilibrium method was the tool used for the prediction of the Kapitza resistance for a binary semiconductor/metal system. Physical explanations are provided for rationalizing the simulation results. PACS: 68.65.Cd, 66.70.Df, 81.16.-c, 65.80.-g, 31.12.xv.

No MeSH data available.


Related in: MedlinePlus

Structural comparison between conventional superlattices and vertical superlattices.
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Figure 2: Structural comparison between conventional superlattices and vertical superlattices.

Mentions: To reduce the processing time and the manufacturing costs, vertical build superlattices are proposed as opposed to conventional planar superlattices. In Figure 2, a schematic representation of the two types of superlattices is given comparing their geometries. With this process, silicon/metal superlattices can be fabricated. Although final device will have material layers in the tens of nanometre range, 5- and 15-μm width superlattices are fabricated using typical UV lithography. These thick layer superlattices are necessary to develop an accurate model of thermal resistance at the metal/semiconductor interfaces.


Thermal conductivity and thermal boundary resistance of nanostructures.

Termentzidis K, Parasuraman J, Da Cruz CA, Merabia S, Angelescu D, Marty F, Bourouina T, Kleber X, Chantrenne P, Basset P - Nanoscale Res Lett (2011)

Structural comparison between conventional superlattices and vertical superlattices.
© Copyright Policy - open-access
Related In: Results  -  Collection

License
Show All Figures
getmorefigures.php?uid=PMC3211353&req=5

Figure 2: Structural comparison between conventional superlattices and vertical superlattices.
Mentions: To reduce the processing time and the manufacturing costs, vertical build superlattices are proposed as opposed to conventional planar superlattices. In Figure 2, a schematic representation of the two types of superlattices is given comparing their geometries. With this process, silicon/metal superlattices can be fabricated. Although final device will have material layers in the tens of nanometre range, 5- and 15-μm width superlattices are fabricated using typical UV lithography. These thick layer superlattices are necessary to develop an accurate model of thermal resistance at the metal/semiconductor interfaces.

Bottom Line: The influence of the interfacial roughness on the thermal conductivity of semiconductor/semiconductor superlattices was studied by equilibrium and non-equilibrium molecular dynamics and on the Kapitza resistance of superlattice's interfaces by equilibrium molecular dynamics.Physical explanations are provided for rationalizing the simulation results.PACS: 68.65.Cd, 66.70.Df, 81.16.-c, 65.80.-g, 31.12.xv.

View Article: PubMed Central - HTML - PubMed

Affiliation: INSA Lyon, CETHIL UMR5008, F-69621 Villeurbanne, France. konstantinos.termentzidis@gmail.com.

ABSTRACT
: We present a fabrication process of low-cost superlattices and simulations related with the heat dissipation on them. The influence of the interfacial roughness on the thermal conductivity of semiconductor/semiconductor superlattices was studied by equilibrium and non-equilibrium molecular dynamics and on the Kapitza resistance of superlattice's interfaces by equilibrium molecular dynamics. The non-equilibrium method was the tool used for the prediction of the Kapitza resistance for a binary semiconductor/metal system. Physical explanations are provided for rationalizing the simulation results. PACS: 68.65.Cd, 66.70.Df, 81.16.-c, 65.80.-g, 31.12.xv.

No MeSH data available.


Related in: MedlinePlus