Limits...
Effect of annealing treatments on photoluminescence and charge storage mechanism in silicon-rich SiNx:H films.

Sahu BS, Delachat F, Slaoui A, Carrada M, Ferblantier G, Muller D - Nanoscale Res Lett (2011)

Bottom Line: The silicon-rich a-SiNx:H films (SRSN) were sandwiched between a bottom thermal SiO2 and a top Si3N4 layer, and subsequently annealed within the temperature range of 500-1100°C in N2 to study the effect of annealing temperature on light-emitting and charge storage properties.A strong visible photoluminescence (PL) at room temperature has been observed for the as-deposited SRSN films as well as for films annealed up to 1100°C.A significant memory window of 4.45 V was obtained at a low operating voltage of ± 8 V for the sample containing 25% excess silicon and annealed at 1000°C, indicating its utility in low-power memory devices.

View Article: PubMed Central - HTML - PubMed

Affiliation: InESS-UdS-CNRS, 23 Rue du Loess, 67037 Strasbourg, France. sahu.bhabani@iness.c-strasbourg.fr.

ABSTRACT
In this study, a wide range of a-SiNx:H films with an excess of silicon (20 to 50%) were prepared with an electron-cyclotron resonance plasma-enhanced chemical vapor deposition system under the flows of NH3 and SiH4. The silicon-rich a-SiNx:H films (SRSN) were sandwiched between a bottom thermal SiO2 and a top Si3N4 layer, and subsequently annealed within the temperature range of 500-1100°C in N2 to study the effect of annealing temperature on light-emitting and charge storage properties. A strong visible photoluminescence (PL) at room temperature has been observed for the as-deposited SRSN films as well as for films annealed up to 1100°C. The possible origins of the PL are briefly discussed. The authors have succeeded in the formation of amorphous Si quantum dots with an average size of about 3 to 3.6 nm by varying excess amount of Si and annealing temperature. Electrical properties have been investigated on Al/Si3N4/SRSN/SiO2/Si structures by capacitance-voltage and conductance-voltage analysis techniques. A significant memory window of 4.45 V was obtained at a low operating voltage of ± 8 V for the sample containing 25% excess silicon and annealed at 1000°C, indicating its utility in low-power memory devices.

No MeSH data available.


Cross-sectional EFTEM image of the sample S4 containing 33 at.% of Si excess after annealing at 1100°C for 30 min in N2 ambient.
© Copyright Policy - open-access
Related In: Results  -  Collection

License
getmorefigures.php?uid=PMC3211231&req=5

Figure 2: Cross-sectional EFTEM image of the sample S4 containing 33 at.% of Si excess after annealing at 1100°C for 30 min in N2 ambient.

Mentions: Figure 2 shows the EFTEM image of 50-nm thick SRSN layer (sample S4) with 33 at.% of Si excess after annealing at 1100°C. High densities of nearly spherical Si-nps are clearly observed. No lattice fringes have been detected in the HREM analysis, suggesting amorphous nature of these nanoclusters. The inset to Figure 2 indicates that the size distribution of Si-nps is centered at 3-nm diameter with a standard deviation of 0.6 nm. However, for other samples with less Si excess, no Si-np was detected in the EFTEM/HREM analysis. It is speculated that even if silicon precipitation has occurred during annealing, the Si cluster size might be below the detection limit of EFTEM (1.5 nm).


Effect of annealing treatments on photoluminescence and charge storage mechanism in silicon-rich SiNx:H films.

Sahu BS, Delachat F, Slaoui A, Carrada M, Ferblantier G, Muller D - Nanoscale Res Lett (2011)

Cross-sectional EFTEM image of the sample S4 containing 33 at.% of Si excess after annealing at 1100°C for 30 min in N2 ambient.
© Copyright Policy - open-access
Related In: Results  -  Collection

License
Show All Figures
getmorefigures.php?uid=PMC3211231&req=5

Figure 2: Cross-sectional EFTEM image of the sample S4 containing 33 at.% of Si excess after annealing at 1100°C for 30 min in N2 ambient.
Mentions: Figure 2 shows the EFTEM image of 50-nm thick SRSN layer (sample S4) with 33 at.% of Si excess after annealing at 1100°C. High densities of nearly spherical Si-nps are clearly observed. No lattice fringes have been detected in the HREM analysis, suggesting amorphous nature of these nanoclusters. The inset to Figure 2 indicates that the size distribution of Si-nps is centered at 3-nm diameter with a standard deviation of 0.6 nm. However, for other samples with less Si excess, no Si-np was detected in the EFTEM/HREM analysis. It is speculated that even if silicon precipitation has occurred during annealing, the Si cluster size might be below the detection limit of EFTEM (1.5 nm).

Bottom Line: The silicon-rich a-SiNx:H films (SRSN) were sandwiched between a bottom thermal SiO2 and a top Si3N4 layer, and subsequently annealed within the temperature range of 500-1100°C in N2 to study the effect of annealing temperature on light-emitting and charge storage properties.A strong visible photoluminescence (PL) at room temperature has been observed for the as-deposited SRSN films as well as for films annealed up to 1100°C.A significant memory window of 4.45 V was obtained at a low operating voltage of ± 8 V for the sample containing 25% excess silicon and annealed at 1000°C, indicating its utility in low-power memory devices.

View Article: PubMed Central - HTML - PubMed

Affiliation: InESS-UdS-CNRS, 23 Rue du Loess, 67037 Strasbourg, France. sahu.bhabani@iness.c-strasbourg.fr.

ABSTRACT
In this study, a wide range of a-SiNx:H films with an excess of silicon (20 to 50%) were prepared with an electron-cyclotron resonance plasma-enhanced chemical vapor deposition system under the flows of NH3 and SiH4. The silicon-rich a-SiNx:H films (SRSN) were sandwiched between a bottom thermal SiO2 and a top Si3N4 layer, and subsequently annealed within the temperature range of 500-1100°C in N2 to study the effect of annealing temperature on light-emitting and charge storage properties. A strong visible photoluminescence (PL) at room temperature has been observed for the as-deposited SRSN films as well as for films annealed up to 1100°C. The possible origins of the PL are briefly discussed. The authors have succeeded in the formation of amorphous Si quantum dots with an average size of about 3 to 3.6 nm by varying excess amount of Si and annealing temperature. Electrical properties have been investigated on Al/Si3N4/SRSN/SiO2/Si structures by capacitance-voltage and conductance-voltage analysis techniques. A significant memory window of 4.45 V was obtained at a low operating voltage of ± 8 V for the sample containing 25% excess silicon and annealed at 1000°C, indicating its utility in low-power memory devices.

No MeSH data available.