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Effect of ion implantation energy for the synthesis of Ge nanocrystals in SiN films with HfO2/SiO2 stack tunnel dielectrics for memory application.

Sahu BS, Gloux F, Slaoui A, Carrada M, Muller D, Groenen J, Bonafos C, Lhostis S - Nanoscale Res Lett (2011)

Bottom Line: No Ge-NC was detected with a lower implantation energy of 3 keV at a dose of 1.5 × 1016 cm-2, whereas a well-defined 2D-array of nearly spherical and well-separated Ge-NCs within the SiN matrix was observed for the higher-energy-implanted (5 keV) sample for the same implanted dose.The MIS memory structures implanted with 5 keV exhibits better charge storage and retention characteristics compared to the low-energy-implanted sample, indicating that the charge storage is predominantly in Ge-NCs in the memory capacitor.A significant memory window of 3.95 V has been observed under the low operating voltage of ± 6 V with good retention properties, indicating the feasibility of these stack structures for low operating voltage, non-volatile memory devices.

View Article: PubMed Central - HTML - PubMed

Affiliation: InESS, UDS-CNRS, 23 rue du Loess, 67037 Strasbourg, France. sahu.bhabani@iness.c-strasbourg.fr.

ABSTRACT
Ge nanocrystals (Ge-NCs) embedded in SiN dielectrics with HfO2/SiO2 stack tunnel dielectrics were synthesized by utilizing low-energy (≤5 keV) ion implantation method followed by conventional thermal annealing at 800°C, the key variable being Ge+ ion implantation energy. Two different energies (3 and 5 keV) have been chosen for the evolution of Ge-NCs, which have been found to possess significant changes in structural and chemical properties of the Ge+-implanted dielectric films, and well reflected in the charge storage properties of the Al/SiN/Ge-NC + SiN/HfO2/SiO2/Si metal-insulator-semiconductor (MIS) memory structures. No Ge-NC was detected with a lower implantation energy of 3 keV at a dose of 1.5 × 1016 cm-2, whereas a well-defined 2D-array of nearly spherical and well-separated Ge-NCs within the SiN matrix was observed for the higher-energy-implanted (5 keV) sample for the same implanted dose. The MIS memory structures implanted with 5 keV exhibits better charge storage and retention characteristics compared to the low-energy-implanted sample, indicating that the charge storage is predominantly in Ge-NCs in the memory capacitor. A significant memory window of 3.95 V has been observed under the low operating voltage of ± 6 V with good retention properties, indicating the feasibility of these stack structures for low operating voltage, non-volatile memory devices.

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Frequency dependent C-V hysteresis windows. The C-V hysteresis windows measured at various frequencies ranging from 10 kHz to 1 MHz for the two samples at a sweep voltage of ± 6 V. The observed memory windows maintain the same value of 3.95 and 0.72 V for the applied frequencies in samples A5 and A3, respectively.
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Figure 4: Frequency dependent C-V hysteresis windows. The C-V hysteresis windows measured at various frequencies ranging from 10 kHz to 1 MHz for the two samples at a sweep voltage of ± 6 V. The observed memory windows maintain the same value of 3.95 and 0.72 V for the applied frequencies in samples A5 and A3, respectively.

Mentions: For a better understanding of the results, frequency-dependent C-V and G-V measurements were further carried out in the frequency range of 10-500 kHz. This is to ascertain that most of the charging effect originated mainly from Ge-NCs and/or Ge-NCs-related traps with minimal influence from interface traps, which typically lead to frequency dispersion in C-V and G-V characteristics. For this purpose, G-V measurement is considered to be a more sensitive approach than C-V measurement technique and provides the dynamic information related to trap density [25-27]. In fact, conductance is directly related to the energy loss in response to the applied AC signal during the capture and emission of charge carriers by interface states. Frequency-dependent C-V and G/w-V curves for sample A3 and A5 are shown in Figure 3a,b, respectively. In both cases, no distortion in C-V characteristics due to slow traps and/or large surface density (flat step) was observed in the samples under study with a change in frequency. It was noticed that the full-width-at-half-maximum (FWHM) of the conductance peak is small and almost constant in the frequency range of 10-500 kHz, indicating that the hysteresis and conductance peak are of the same origin [28]. It is a well-known fact that a conductance peak with large FWHM values can be attributed to the presence of a considerable amount of interface states. It is interesting to note that both C-V and G/w-V curves of sample A3 shift toward more positive bias with decreasing frequency, and the shift is more prominent in the low-frequency region (<50 kHz). The shift is marked by minimal frequency dispersion in accumulation (less than 2%), capacitance indicating minimal influence of series resistance, and dielectric constant variation with altering the measurement frequency. From Figure 4, it is noteworthy that the same amount of hysteresis and stored charge were obtained in sample A3 irrespective of the measurement frequency. Hence, the capacitance shift can be attributed to the presence of fast traps and/or border traps (near-interfacial traps), which can have a rapid communication with the underlying Si-substrate [29]. The G/w-V curves shift in accordance with the C-V curves. It was observed that G/w-V curves of sample A3 exhibit broader and larger peaks near flat-band voltage than those of sample A5, indicating higher energy loss during charge exchange.


Effect of ion implantation energy for the synthesis of Ge nanocrystals in SiN films with HfO2/SiO2 stack tunnel dielectrics for memory application.

Sahu BS, Gloux F, Slaoui A, Carrada M, Muller D, Groenen J, Bonafos C, Lhostis S - Nanoscale Res Lett (2011)

Frequency dependent C-V hysteresis windows. The C-V hysteresis windows measured at various frequencies ranging from 10 kHz to 1 MHz for the two samples at a sweep voltage of ± 6 V. The observed memory windows maintain the same value of 3.95 and 0.72 V for the applied frequencies in samples A5 and A3, respectively.
© Copyright Policy - open-access
Related In: Results  -  Collection

License
Show All Figures
getmorefigures.php?uid=PMC3211230&req=5

Figure 4: Frequency dependent C-V hysteresis windows. The C-V hysteresis windows measured at various frequencies ranging from 10 kHz to 1 MHz for the two samples at a sweep voltage of ± 6 V. The observed memory windows maintain the same value of 3.95 and 0.72 V for the applied frequencies in samples A5 and A3, respectively.
Mentions: For a better understanding of the results, frequency-dependent C-V and G-V measurements were further carried out in the frequency range of 10-500 kHz. This is to ascertain that most of the charging effect originated mainly from Ge-NCs and/or Ge-NCs-related traps with minimal influence from interface traps, which typically lead to frequency dispersion in C-V and G-V characteristics. For this purpose, G-V measurement is considered to be a more sensitive approach than C-V measurement technique and provides the dynamic information related to trap density [25-27]. In fact, conductance is directly related to the energy loss in response to the applied AC signal during the capture and emission of charge carriers by interface states. Frequency-dependent C-V and G/w-V curves for sample A3 and A5 are shown in Figure 3a,b, respectively. In both cases, no distortion in C-V characteristics due to slow traps and/or large surface density (flat step) was observed in the samples under study with a change in frequency. It was noticed that the full-width-at-half-maximum (FWHM) of the conductance peak is small and almost constant in the frequency range of 10-500 kHz, indicating that the hysteresis and conductance peak are of the same origin [28]. It is a well-known fact that a conductance peak with large FWHM values can be attributed to the presence of a considerable amount of interface states. It is interesting to note that both C-V and G/w-V curves of sample A3 shift toward more positive bias with decreasing frequency, and the shift is more prominent in the low-frequency region (<50 kHz). The shift is marked by minimal frequency dispersion in accumulation (less than 2%), capacitance indicating minimal influence of series resistance, and dielectric constant variation with altering the measurement frequency. From Figure 4, it is noteworthy that the same amount of hysteresis and stored charge were obtained in sample A3 irrespective of the measurement frequency. Hence, the capacitance shift can be attributed to the presence of fast traps and/or border traps (near-interfacial traps), which can have a rapid communication with the underlying Si-substrate [29]. The G/w-V curves shift in accordance with the C-V curves. It was observed that G/w-V curves of sample A3 exhibit broader and larger peaks near flat-band voltage than those of sample A5, indicating higher energy loss during charge exchange.

Bottom Line: No Ge-NC was detected with a lower implantation energy of 3 keV at a dose of 1.5 × 1016 cm-2, whereas a well-defined 2D-array of nearly spherical and well-separated Ge-NCs within the SiN matrix was observed for the higher-energy-implanted (5 keV) sample for the same implanted dose.The MIS memory structures implanted with 5 keV exhibits better charge storage and retention characteristics compared to the low-energy-implanted sample, indicating that the charge storage is predominantly in Ge-NCs in the memory capacitor.A significant memory window of 3.95 V has been observed under the low operating voltage of ± 6 V with good retention properties, indicating the feasibility of these stack structures for low operating voltage, non-volatile memory devices.

View Article: PubMed Central - HTML - PubMed

Affiliation: InESS, UDS-CNRS, 23 rue du Loess, 67037 Strasbourg, France. sahu.bhabani@iness.c-strasbourg.fr.

ABSTRACT
Ge nanocrystals (Ge-NCs) embedded in SiN dielectrics with HfO2/SiO2 stack tunnel dielectrics were synthesized by utilizing low-energy (≤5 keV) ion implantation method followed by conventional thermal annealing at 800°C, the key variable being Ge+ ion implantation energy. Two different energies (3 and 5 keV) have been chosen for the evolution of Ge-NCs, which have been found to possess significant changes in structural and chemical properties of the Ge+-implanted dielectric films, and well reflected in the charge storage properties of the Al/SiN/Ge-NC + SiN/HfO2/SiO2/Si metal-insulator-semiconductor (MIS) memory structures. No Ge-NC was detected with a lower implantation energy of 3 keV at a dose of 1.5 × 1016 cm-2, whereas a well-defined 2D-array of nearly spherical and well-separated Ge-NCs within the SiN matrix was observed for the higher-energy-implanted (5 keV) sample for the same implanted dose. The MIS memory structures implanted with 5 keV exhibits better charge storage and retention characteristics compared to the low-energy-implanted sample, indicating that the charge storage is predominantly in Ge-NCs in the memory capacitor. A significant memory window of 3.95 V has been observed under the low operating voltage of ± 6 V with good retention properties, indicating the feasibility of these stack structures for low operating voltage, non-volatile memory devices.

No MeSH data available.


Related in: MedlinePlus