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Effect of ion implantation energy for the synthesis of Ge nanocrystals in SiN films with HfO2/SiO2 stack tunnel dielectrics for memory application.

Sahu BS, Gloux F, Slaoui A, Carrada M, Muller D, Groenen J, Bonafos C, Lhostis S - Nanoscale Res Lett (2011)

Bottom Line: No Ge-NC was detected with a lower implantation energy of 3 keV at a dose of 1.5 × 1016 cm-2, whereas a well-defined 2D-array of nearly spherical and well-separated Ge-NCs within the SiN matrix was observed for the higher-energy-implanted (5 keV) sample for the same implanted dose.The MIS memory structures implanted with 5 keV exhibits better charge storage and retention characteristics compared to the low-energy-implanted sample, indicating that the charge storage is predominantly in Ge-NCs in the memory capacitor.A significant memory window of 3.95 V has been observed under the low operating voltage of ± 6 V with good retention properties, indicating the feasibility of these stack structures for low operating voltage, non-volatile memory devices.

View Article: PubMed Central - HTML - PubMed

Affiliation: InESS, UDS-CNRS, 23 rue du Loess, 67037 Strasbourg, France. sahu.bhabani@iness.c-strasbourg.fr.

ABSTRACT
Ge nanocrystals (Ge-NCs) embedded in SiN dielectrics with HfO2/SiO2 stack tunnel dielectrics were synthesized by utilizing low-energy (≤5 keV) ion implantation method followed by conventional thermal annealing at 800°C, the key variable being Ge+ ion implantation energy. Two different energies (3 and 5 keV) have been chosen for the evolution of Ge-NCs, which have been found to possess significant changes in structural and chemical properties of the Ge+-implanted dielectric films, and well reflected in the charge storage properties of the Al/SiN/Ge-NC + SiN/HfO2/SiO2/Si metal-insulator-semiconductor (MIS) memory structures. No Ge-NC was detected with a lower implantation energy of 3 keV at a dose of 1.5 × 1016 cm-2, whereas a well-defined 2D-array of nearly spherical and well-separated Ge-NCs within the SiN matrix was observed for the higher-energy-implanted (5 keV) sample for the same implanted dose. The MIS memory structures implanted with 5 keV exhibits better charge storage and retention characteristics compared to the low-energy-implanted sample, indicating that the charge storage is predominantly in Ge-NCs in the memory capacitor. A significant memory window of 3.95 V has been observed under the low operating voltage of ± 6 V with good retention properties, indicating the feasibility of these stack structures for low operating voltage, non-volatile memory devices.

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C-V characteristics of Ge+-implanted and subsequently annealed SiN/HfO2/SiO2 stack layers. (a) High-frequency (500 kHz) C-V characteristics of Al/SiN/HfO2/SiO2/Si MIS structures with Ge-NCs embedded in the SiN layer with HfO2/SiO2 stack tunnel dielectrics stack layer implanted at two different energies of 3 and 5 keV, along with the control sample, (b) variation of memory window (calculated from flat-band shifts) as a function of absolute sweep voltage
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Figure 2: C-V characteristics of Ge+-implanted and subsequently annealed SiN/HfO2/SiO2 stack layers. (a) High-frequency (500 kHz) C-V characteristics of Al/SiN/HfO2/SiO2/Si MIS structures with Ge-NCs embedded in the SiN layer with HfO2/SiO2 stack tunnel dielectrics stack layer implanted at two different energies of 3 and 5 keV, along with the control sample, (b) variation of memory window (calculated from flat-band shifts) as a function of absolute sweep voltage

Mentions: Cross-sectional HREM images of the post-implanted annealed samples A3 and A5 are shown in Figure 1a,b, respectively. As evident from Figure 1a, no Ge-NC was observed for sample A3. The SiN layer underwent a swelling of about 4 nm, whereas the thickness of the underlying HfO2 and SiO2 layers remain almost the same as in the as-deposited sample. In contrast, HREM image of sample A5 (Figure 2b) shows the existence of a Ge-NC with clear lattice fringes with a separation of 0.327 nm, which matches well with the Ge (111) inter planar distance in the diamond structure. Nearly spherical-shaped Ge-NCs with an average size of about 3.5 nm were clearly observed in the SiN matrix at a distance of about 5.6 nm from SiN/HfO2 interface. The total SiN thickness (with embedded Ge-NCs) is 15.7 nm, indicating significant swelling of this layer (3.7 nm) as a result of ion implantation and annealing. There is no significant increase of the HfO2 thickness while the interfacial SiO2 (IL) layer increases from 1.2 to 1.9 nm as a result of implantation and annealing. This swelling could be attributed to the Si substrate oxidation. This phenomenon has already been observed for ion-implanted thin layers and has been attributed to penetration of H2O from the ambient through the highly damaged layers [18]. It is noteworthy that the total SiN thickness of both samples after post-implantation thermal annealing is comparable, indicating the weak dependence of swelling effect on implantation energy [19]. As discussed before, for low implantation energies, swelling effect is predominantly dependent on implantation dose rather than implantation energy [19,20].


Effect of ion implantation energy for the synthesis of Ge nanocrystals in SiN films with HfO2/SiO2 stack tunnel dielectrics for memory application.

Sahu BS, Gloux F, Slaoui A, Carrada M, Muller D, Groenen J, Bonafos C, Lhostis S - Nanoscale Res Lett (2011)

C-V characteristics of Ge+-implanted and subsequently annealed SiN/HfO2/SiO2 stack layers. (a) High-frequency (500 kHz) C-V characteristics of Al/SiN/HfO2/SiO2/Si MIS structures with Ge-NCs embedded in the SiN layer with HfO2/SiO2 stack tunnel dielectrics stack layer implanted at two different energies of 3 and 5 keV, along with the control sample, (b) variation of memory window (calculated from flat-band shifts) as a function of absolute sweep voltage
© Copyright Policy - open-access
Related In: Results  -  Collection

License
Show All Figures
getmorefigures.php?uid=PMC3211230&req=5

Figure 2: C-V characteristics of Ge+-implanted and subsequently annealed SiN/HfO2/SiO2 stack layers. (a) High-frequency (500 kHz) C-V characteristics of Al/SiN/HfO2/SiO2/Si MIS structures with Ge-NCs embedded in the SiN layer with HfO2/SiO2 stack tunnel dielectrics stack layer implanted at two different energies of 3 and 5 keV, along with the control sample, (b) variation of memory window (calculated from flat-band shifts) as a function of absolute sweep voltage
Mentions: Cross-sectional HREM images of the post-implanted annealed samples A3 and A5 are shown in Figure 1a,b, respectively. As evident from Figure 1a, no Ge-NC was observed for sample A3. The SiN layer underwent a swelling of about 4 nm, whereas the thickness of the underlying HfO2 and SiO2 layers remain almost the same as in the as-deposited sample. In contrast, HREM image of sample A5 (Figure 2b) shows the existence of a Ge-NC with clear lattice fringes with a separation of 0.327 nm, which matches well with the Ge (111) inter planar distance in the diamond structure. Nearly spherical-shaped Ge-NCs with an average size of about 3.5 nm were clearly observed in the SiN matrix at a distance of about 5.6 nm from SiN/HfO2 interface. The total SiN thickness (with embedded Ge-NCs) is 15.7 nm, indicating significant swelling of this layer (3.7 nm) as a result of ion implantation and annealing. There is no significant increase of the HfO2 thickness while the interfacial SiO2 (IL) layer increases from 1.2 to 1.9 nm as a result of implantation and annealing. This swelling could be attributed to the Si substrate oxidation. This phenomenon has already been observed for ion-implanted thin layers and has been attributed to penetration of H2O from the ambient through the highly damaged layers [18]. It is noteworthy that the total SiN thickness of both samples after post-implantation thermal annealing is comparable, indicating the weak dependence of swelling effect on implantation energy [19]. As discussed before, for low implantation energies, swelling effect is predominantly dependent on implantation dose rather than implantation energy [19,20].

Bottom Line: No Ge-NC was detected with a lower implantation energy of 3 keV at a dose of 1.5 × 1016 cm-2, whereas a well-defined 2D-array of nearly spherical and well-separated Ge-NCs within the SiN matrix was observed for the higher-energy-implanted (5 keV) sample for the same implanted dose.The MIS memory structures implanted with 5 keV exhibits better charge storage and retention characteristics compared to the low-energy-implanted sample, indicating that the charge storage is predominantly in Ge-NCs in the memory capacitor.A significant memory window of 3.95 V has been observed under the low operating voltage of ± 6 V with good retention properties, indicating the feasibility of these stack structures for low operating voltage, non-volatile memory devices.

View Article: PubMed Central - HTML - PubMed

Affiliation: InESS, UDS-CNRS, 23 rue du Loess, 67037 Strasbourg, France. sahu.bhabani@iness.c-strasbourg.fr.

ABSTRACT
Ge nanocrystals (Ge-NCs) embedded in SiN dielectrics with HfO2/SiO2 stack tunnel dielectrics were synthesized by utilizing low-energy (≤5 keV) ion implantation method followed by conventional thermal annealing at 800°C, the key variable being Ge+ ion implantation energy. Two different energies (3 and 5 keV) have been chosen for the evolution of Ge-NCs, which have been found to possess significant changes in structural and chemical properties of the Ge+-implanted dielectric films, and well reflected in the charge storage properties of the Al/SiN/Ge-NC + SiN/HfO2/SiO2/Si metal-insulator-semiconductor (MIS) memory structures. No Ge-NC was detected with a lower implantation energy of 3 keV at a dose of 1.5 × 1016 cm-2, whereas a well-defined 2D-array of nearly spherical and well-separated Ge-NCs within the SiN matrix was observed for the higher-energy-implanted (5 keV) sample for the same implanted dose. The MIS memory structures implanted with 5 keV exhibits better charge storage and retention characteristics compared to the low-energy-implanted sample, indicating that the charge storage is predominantly in Ge-NCs in the memory capacitor. A significant memory window of 3.95 V has been observed under the low operating voltage of ± 6 V with good retention properties, indicating the feasibility of these stack structures for low operating voltage, non-volatile memory devices.

No MeSH data available.


Related in: MedlinePlus