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Hf-based high-k materials for Si nanocrystal floating gate memories.

Khomenkova L, Sahu BS, Slaoui A, Gourbilleau F - Nanoscale Res Lett (2011)

Bottom Line: Pure and Si-rich HfO2 layers fabricated by radio frequency sputtering were utilized as alternative tunnel oxide layers for high-k/Si-nanocrystals-SiO2/SiO2 memory structures.The effect of Si incorporation on the properties of Hf-based tunnel layer was investigated.The capacitance-voltage measurements were performed to study the charge trapping characteristics of these structures.

View Article: PubMed Central - HTML - PubMed

Affiliation: CIMAP, UMR CNRS/CEA/ENSICAEN/UCBN 6252, Ensicaen, 6 Bd Mal Juin, 14050 Caen Cedex 4, France. larysa.khomenkova@ensicaen.fr.

ABSTRACT
Pure and Si-rich HfO2 layers fabricated by radio frequency sputtering were utilized as alternative tunnel oxide layers for high-k/Si-nanocrystals-SiO2/SiO2 memory structures. The effect of Si incorporation on the properties of Hf-based tunnel layer was investigated. The Si-rich SiO2 active layers were used as charge storage layers, and their properties were studied versus deposition conditions and annealing treatment. The capacitance-voltage measurements were performed to study the charge trapping characteristics of these structures. It was shown that with specific deposition conditions and annealing treatment, a large memory window of about 6.8 V is achievable at a sweeping voltage of ± 6 V, indicating the utility of these stack structures for low-operating-voltage nonvolatile memory devices.

No MeSH data available.


Related in: MedlinePlus

C-V characteristics of MIS structures containing pure HfO2 and HfSiO films. High-frequency C-V characteristics of pure and Si-rich HfO2 single layers versus Si content in the films (a) and deposition temperature (b) measured at 100 kHz. The C-V curves were normalized to their respective accumulation capacitance. All the high-k films were annealed at 800°C for 15 min. Deposition temperature is mentioned in the figures.
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Figure 1: C-V characteristics of MIS structures containing pure HfO2 and HfSiO films. High-frequency C-V characteristics of pure and Si-rich HfO2 single layers versus Si content in the films (a) and deposition temperature (b) measured at 100 kHz. The C-V curves were normalized to their respective accumulation capacitance. All the high-k films were annealed at 800°C for 15 min. Deposition temperature is mentioned in the figures.

Mentions: Figure 1a, b represents the C-V curves of MIS structures containing pure HfO2 and HfSiO films (RSi = 6% and 12%) measured at 100 kHz. As evident from the figure, pure HfO2 and HfSiO (RSi = 12%) layers grown at 45°C exhibit irregular C-V curves at 100 kHz. They show existence of humps, which are the characteristic features of slow traps present at the insulator/semiconductor interface, i.e., defects that are distributed away from the interface to the insulator. Hence, electron emission and capture produce broad time constant dispersion giving rise to hysteresis in the C-V curves. In addition, the C-V curves demonstrate negative Vfb shift indicating the existence of fixed insulating charges in these layers. Similar effect was observed for the HfO2-based layers grown at 100°C (not shown here).


Hf-based high-k materials for Si nanocrystal floating gate memories.

Khomenkova L, Sahu BS, Slaoui A, Gourbilleau F - Nanoscale Res Lett (2011)

C-V characteristics of MIS structures containing pure HfO2 and HfSiO films. High-frequency C-V characteristics of pure and Si-rich HfO2 single layers versus Si content in the films (a) and deposition temperature (b) measured at 100 kHz. The C-V curves were normalized to their respective accumulation capacitance. All the high-k films were annealed at 800°C for 15 min. Deposition temperature is mentioned in the figures.
© Copyright Policy - open-access
Related In: Results  -  Collection

License
Show All Figures
getmorefigures.php?uid=PMC3211225&req=5

Figure 1: C-V characteristics of MIS structures containing pure HfO2 and HfSiO films. High-frequency C-V characteristics of pure and Si-rich HfO2 single layers versus Si content in the films (a) and deposition temperature (b) measured at 100 kHz. The C-V curves were normalized to their respective accumulation capacitance. All the high-k films were annealed at 800°C for 15 min. Deposition temperature is mentioned in the figures.
Mentions: Figure 1a, b represents the C-V curves of MIS structures containing pure HfO2 and HfSiO films (RSi = 6% and 12%) measured at 100 kHz. As evident from the figure, pure HfO2 and HfSiO (RSi = 12%) layers grown at 45°C exhibit irregular C-V curves at 100 kHz. They show existence of humps, which are the characteristic features of slow traps present at the insulator/semiconductor interface, i.e., defects that are distributed away from the interface to the insulator. Hence, electron emission and capture produce broad time constant dispersion giving rise to hysteresis in the C-V curves. In addition, the C-V curves demonstrate negative Vfb shift indicating the existence of fixed insulating charges in these layers. Similar effect was observed for the HfO2-based layers grown at 100°C (not shown here).

Bottom Line: Pure and Si-rich HfO2 layers fabricated by radio frequency sputtering were utilized as alternative tunnel oxide layers for high-k/Si-nanocrystals-SiO2/SiO2 memory structures.The effect of Si incorporation on the properties of Hf-based tunnel layer was investigated.The capacitance-voltage measurements were performed to study the charge trapping characteristics of these structures.

View Article: PubMed Central - HTML - PubMed

Affiliation: CIMAP, UMR CNRS/CEA/ENSICAEN/UCBN 6252, Ensicaen, 6 Bd Mal Juin, 14050 Caen Cedex 4, France. larysa.khomenkova@ensicaen.fr.

ABSTRACT
Pure and Si-rich HfO2 layers fabricated by radio frequency sputtering were utilized as alternative tunnel oxide layers for high-k/Si-nanocrystals-SiO2/SiO2 memory structures. The effect of Si incorporation on the properties of Hf-based tunnel layer was investigated. The Si-rich SiO2 active layers were used as charge storage layers, and their properties were studied versus deposition conditions and annealing treatment. The capacitance-voltage measurements were performed to study the charge trapping characteristics of these structures. It was shown that with specific deposition conditions and annealing treatment, a large memory window of about 6.8 V is achievable at a sweeping voltage of ± 6 V, indicating the utility of these stack structures for low-operating-voltage nonvolatile memory devices.

No MeSH data available.


Related in: MedlinePlus