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Characterization of silicon heterojunctions for solar cells.

Kleider JP, Alvarez J, Ankudinov AV, Gudovskikh AS, Gushchina EV, Labrune M, Maslova OA, Favre W, Gueunier-Farret ME, Roca I Cabarrocas P, Terukov EI - Nanoscale Res Lett (2011)

Bottom Line: This is in good agreement with planar conductance measurements that show a large interface conductance.It is demonstrated that these features are related to the existence of a strong inversion layer of holes at the c-Si surface of (p) a-Si:H/(n) c-Si structures, and to a strong inversion layer of electrons at the c-Si surface of (n) a-Si:H/(p) c-Si heterojunctions.These are intimately related to the band offsets, which allows us to determine these parameters with good precision.

View Article: PubMed Central - HTML - PubMed

Affiliation: Laboratoire de Génie Electrique de Paris, CNRS UMR 8507, SUPELEC, Univ P-Sud, UPMC Univ Paris 6, 11 rue Joliot-Curie, Plateau de Moulon, 91192 Gif-sur-Yvette Cedex, France. jean-paul.kleider@lgep.supelec.fr.

ABSTRACT
Conductive-probe atomic force microscopy (CP-AFM) measurements reveal the existence of a conductive channel at the interface between p-type hydrogenated amorphous silicon (a-Si:H) and n-type crystalline silicon (c-Si) as well as at the interface between n-type a-Si:H and p-type c-Si. This is in good agreement with planar conductance measurements that show a large interface conductance. It is demonstrated that these features are related to the existence of a strong inversion layer of holes at the c-Si surface of (p) a-Si:H/(n) c-Si structures, and to a strong inversion layer of electrons at the c-Si surface of (n) a-Si:H/(p) c-Si heterojunctions. These are intimately related to the band offsets, which allows us to determine these parameters with good precision.

No MeSH data available.


AFM pictures taken on a cleaved section of an ITO/(p) a-Si:H/(n) c-Si/ITO sample. Left: topography; middle: current image taken at an applied bias of +1.5 V. Right: current image taken at an applied bias of -1.5 V. Typical roughness was less than 5 nm. On the topographical image, the change in height from the dark top region to the light bottom region was of the order of 2 nm. In the current images, the current values ranged from 60 pA to 17 nA.
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Figure 4: AFM pictures taken on a cleaved section of an ITO/(p) a-Si:H/(n) c-Si/ITO sample. Left: topography; middle: current image taken at an applied bias of +1.5 V. Right: current image taken at an applied bias of -1.5 V. Typical roughness was less than 5 nm. On the topographical image, the change in height from the dark top region to the light bottom region was of the order of 2 nm. In the current images, the current values ranged from 60 pA to 17 nA.

Mentions: In Figure 4a,b,c, an example of topography and current images for two different biases, is presented for a (p) a-Si:H/(n) c-Si junction. At positive bias applied to the sample, conductive regions appear light in the current images, while for negative bias they appear dark. The current images clearly reveal a conductive interface layer between the c-Si substrate and the a-Si:H film. This layer is more conductive than both the c-Si and a-Si:H regions. This conductive interface layer was well observed on all samples for both (p) a-Si:H/(n) c-Si and (n) a-Si:H/(p) c-Si heterointerfaces whatever the a-Si:H layer thickness is. It is worth to note that the conductive layer is not an artifact that could come from the surface roughness. It can be clearly seen when current images are compared with the topography one. There exists one distinct boundary between the a-Si:H layer and c-Si wafer, and the detected conductive channel lies within c-Si substrate.


Characterization of silicon heterojunctions for solar cells.

Kleider JP, Alvarez J, Ankudinov AV, Gudovskikh AS, Gushchina EV, Labrune M, Maslova OA, Favre W, Gueunier-Farret ME, Roca I Cabarrocas P, Terukov EI - Nanoscale Res Lett (2011)

AFM pictures taken on a cleaved section of an ITO/(p) a-Si:H/(n) c-Si/ITO sample. Left: topography; middle: current image taken at an applied bias of +1.5 V. Right: current image taken at an applied bias of -1.5 V. Typical roughness was less than 5 nm. On the topographical image, the change in height from the dark top region to the light bottom region was of the order of 2 nm. In the current images, the current values ranged from 60 pA to 17 nA.
© Copyright Policy - open-access
Related In: Results  -  Collection

License
Show All Figures
getmorefigures.php?uid=PMC3211203&req=5

Figure 4: AFM pictures taken on a cleaved section of an ITO/(p) a-Si:H/(n) c-Si/ITO sample. Left: topography; middle: current image taken at an applied bias of +1.5 V. Right: current image taken at an applied bias of -1.5 V. Typical roughness was less than 5 nm. On the topographical image, the change in height from the dark top region to the light bottom region was of the order of 2 nm. In the current images, the current values ranged from 60 pA to 17 nA.
Mentions: In Figure 4a,b,c, an example of topography and current images for two different biases, is presented for a (p) a-Si:H/(n) c-Si junction. At positive bias applied to the sample, conductive regions appear light in the current images, while for negative bias they appear dark. The current images clearly reveal a conductive interface layer between the c-Si substrate and the a-Si:H film. This layer is more conductive than both the c-Si and a-Si:H regions. This conductive interface layer was well observed on all samples for both (p) a-Si:H/(n) c-Si and (n) a-Si:H/(p) c-Si heterointerfaces whatever the a-Si:H layer thickness is. It is worth to note that the conductive layer is not an artifact that could come from the surface roughness. It can be clearly seen when current images are compared with the topography one. There exists one distinct boundary between the a-Si:H layer and c-Si wafer, and the detected conductive channel lies within c-Si substrate.

Bottom Line: This is in good agreement with planar conductance measurements that show a large interface conductance.It is demonstrated that these features are related to the existence of a strong inversion layer of holes at the c-Si surface of (p) a-Si:H/(n) c-Si structures, and to a strong inversion layer of electrons at the c-Si surface of (n) a-Si:H/(p) c-Si heterojunctions.These are intimately related to the band offsets, which allows us to determine these parameters with good precision.

View Article: PubMed Central - HTML - PubMed

Affiliation: Laboratoire de Génie Electrique de Paris, CNRS UMR 8507, SUPELEC, Univ P-Sud, UPMC Univ Paris 6, 11 rue Joliot-Curie, Plateau de Moulon, 91192 Gif-sur-Yvette Cedex, France. jean-paul.kleider@lgep.supelec.fr.

ABSTRACT
Conductive-probe atomic force microscopy (CP-AFM) measurements reveal the existence of a conductive channel at the interface between p-type hydrogenated amorphous silicon (a-Si:H) and n-type crystalline silicon (c-Si) as well as at the interface between n-type a-Si:H and p-type c-Si. This is in good agreement with planar conductance measurements that show a large interface conductance. It is demonstrated that these features are related to the existence of a strong inversion layer of holes at the c-Si surface of (p) a-Si:H/(n) c-Si structures, and to a strong inversion layer of electrons at the c-Si surface of (n) a-Si:H/(p) c-Si heterojunctions. These are intimately related to the band offsets, which allows us to determine these parameters with good precision.

No MeSH data available.