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Near-surface processing on AlGaN/GaN heterostructures: a nanoscale electrical and structural characterization.

Greco G, Giannazzo F, Frazzetto A, Raineri V, Roccaforte F - Nanoscale Res Lett (2011)

Bottom Line: In particular, a CHF3-based plasma process in the gate region resulted in a shift of the threshold voltage in HEMT devices towards less negative values.Two-dimensional current maps acquired by C-AFM on the sample surface allowed us to monitor the local electrical modifications induced by the plasma fluorine incorporated in the material.The results are compared with a recently introduced gate control processing: the local rapid thermal oxidation process of the AlGaN layer.By this process, a controlled thin oxide layer on surface of AlGaN can be reliably introduced while the resistance of the layer below increase locally.

View Article: PubMed Central - HTML - PubMed

Affiliation: Consiglio Nazionale delle Ricerche - Istituto per la Microelettronica e Microsistemi (CNR-IMM), Strada VIII n, 5, Zona Industriale, 95121 Catania, Italy. fabrizio.roccaforte@imm.cnr.it.

ABSTRACT
The effects of near-surface processing on the properties of AlGaN/GaN heterostructures were studied, combining conventional electrical characterization on high-electron mobility transistors (HEMTs), with advanced characterization techniques with nanometer scale resolution, i.e., transmission electron microscopy, atomic force microscopy (AFM) and conductive atomic force microscopy (C-AFM). In particular, a CHF3-based plasma process in the gate region resulted in a shift of the threshold voltage in HEMT devices towards less negative values. Two-dimensional current maps acquired by C-AFM on the sample surface allowed us to monitor the local electrical modifications induced by the plasma fluorine incorporated in the material.The results are compared with a recently introduced gate control processing: the local rapid thermal oxidation process of the AlGaN layer. By this process, a controlled thin oxide layer on surface of AlGaN can be reliably introduced while the resistance of the layer below increase locally.

No MeSH data available.


Related in: MedlinePlus

Capacitance and sheet carrier density versus gate bias. Capacitance versus gate bias (C-VGS) (a) and sheet carrier density versus gate bias (ns-VGS) (b) measured on the untreated (squares) and plasma treated (triangles) devices.
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Figure 2: Capacitance and sheet carrier density versus gate bias. Capacitance versus gate bias (C-VGS) (a) and sheet carrier density versus gate bias (ns-VGS) (b) measured on the untreated (squares) and plasma treated (triangles) devices.

Mentions: Figure 2a reports the C-VGS curves acquired in the same devices between the gate Schottky contact and the source electrode. A shift towards less negative values on the bias axis is visible for the C-VGS curve on the plasma-treated sample. The sheet carrier concentration ns can be also evaluated by integrating the C-VGS curves, as described in detail in reference [1]. The ns-VGS curves for the untreated and CHF3-treated samples are reported in Figure 2b. For a gate bias of 0 V, a decrease of ns from 5 × 1012 cm-2 in the as-prepared sample to 2 × 1012 cm-2 after the plasma treatment was found. For VGS = +2 V, ns reaches a value of 7 × 1012 cm-2, for the plasma-treated sample. From the ns-VGS curves in Figure 2(b), it was also possible to extract a precise value of the threshold voltage. We found a Vth = -1.92 V for the as prepared device and Vth = -0.8 V for the processed device.


Near-surface processing on AlGaN/GaN heterostructures: a nanoscale electrical and structural characterization.

Greco G, Giannazzo F, Frazzetto A, Raineri V, Roccaforte F - Nanoscale Res Lett (2011)

Capacitance and sheet carrier density versus gate bias. Capacitance versus gate bias (C-VGS) (a) and sheet carrier density versus gate bias (ns-VGS) (b) measured on the untreated (squares) and plasma treated (triangles) devices.
© Copyright Policy - open-access
Related In: Results  -  Collection

License
Show All Figures
getmorefigures.php?uid=PMC3211179&req=5

Figure 2: Capacitance and sheet carrier density versus gate bias. Capacitance versus gate bias (C-VGS) (a) and sheet carrier density versus gate bias (ns-VGS) (b) measured on the untreated (squares) and plasma treated (triangles) devices.
Mentions: Figure 2a reports the C-VGS curves acquired in the same devices between the gate Schottky contact and the source electrode. A shift towards less negative values on the bias axis is visible for the C-VGS curve on the plasma-treated sample. The sheet carrier concentration ns can be also evaluated by integrating the C-VGS curves, as described in detail in reference [1]. The ns-VGS curves for the untreated and CHF3-treated samples are reported in Figure 2b. For a gate bias of 0 V, a decrease of ns from 5 × 1012 cm-2 in the as-prepared sample to 2 × 1012 cm-2 after the plasma treatment was found. For VGS = +2 V, ns reaches a value of 7 × 1012 cm-2, for the plasma-treated sample. From the ns-VGS curves in Figure 2(b), it was also possible to extract a precise value of the threshold voltage. We found a Vth = -1.92 V for the as prepared device and Vth = -0.8 V for the processed device.

Bottom Line: In particular, a CHF3-based plasma process in the gate region resulted in a shift of the threshold voltage in HEMT devices towards less negative values.Two-dimensional current maps acquired by C-AFM on the sample surface allowed us to monitor the local electrical modifications induced by the plasma fluorine incorporated in the material.The results are compared with a recently introduced gate control processing: the local rapid thermal oxidation process of the AlGaN layer.By this process, a controlled thin oxide layer on surface of AlGaN can be reliably introduced while the resistance of the layer below increase locally.

View Article: PubMed Central - HTML - PubMed

Affiliation: Consiglio Nazionale delle Ricerche - Istituto per la Microelettronica e Microsistemi (CNR-IMM), Strada VIII n, 5, Zona Industriale, 95121 Catania, Italy. fabrizio.roccaforte@imm.cnr.it.

ABSTRACT
The effects of near-surface processing on the properties of AlGaN/GaN heterostructures were studied, combining conventional electrical characterization on high-electron mobility transistors (HEMTs), with advanced characterization techniques with nanometer scale resolution, i.e., transmission electron microscopy, atomic force microscopy (AFM) and conductive atomic force microscopy (C-AFM). In particular, a CHF3-based plasma process in the gate region resulted in a shift of the threshold voltage in HEMT devices towards less negative values. Two-dimensional current maps acquired by C-AFM on the sample surface allowed us to monitor the local electrical modifications induced by the plasma fluorine incorporated in the material.The results are compared with a recently introduced gate control processing: the local rapid thermal oxidation process of the AlGaN layer. By this process, a controlled thin oxide layer on surface of AlGaN can be reliably introduced while the resistance of the layer below increase locally.

No MeSH data available.


Related in: MedlinePlus