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Tuning the threshold voltage in organic thin-film transistors by local channel doping using photoreactive interfacial layers.

Marchl M, Edler M, Haase A, Fian A, Trimmel G, Griesser T, Stadlober B, Zojer E - Adv. Mater. Weinheim (2010)

View Article: PubMed Central - PubMed

Affiliation: Institute of Solid State Physics, Graz University of Technology, Petersgasse 16, 8010 Graz, Austria.

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Two of the most crucial device parameters are the charge carrier mobility and the threshold voltage (VTh)... Moreover, the VTh shifts for PHDBD interfacial layers are not stable for repeated measurement cycles, as shown in the right plot in Figure 2... For the PBHND-based OTFTs, even after more than 200 measurements the threshold voltage did not shift back considerably... They include an increase of the off current, a larger hysteresis, and a deterioration of the drain current at large negative gate bias... A detailed discussion can be found in the Supporting Information... The PHBND measurements were reproduced for two batches of freshly synthesized polymer and for various samples within one batch... To verify that the observed effects are indeed a consequence of interfacial acid doping, two test experiments were performed... The switch transistor is realized by a non-illuminated PBHND-containing device that has a negative threshold voltage of around VTh = –10 V... The load transistor (also a device containing a PBHND interfacial layer) was illuminated in steps of 1 s in an argon glove box after the inverter wiring was realized... After illuminating the load transistor for 3 s, an optimum value of VTh,load with respect to the threshold voltage of the switch-transistor is reached, resulting in a steep inverter transition with a maximum gain of about 40 (see bottom graph in Figure 3)... Therefore, further significant improvements can be expected by adapting the width-to-length ratio of the channel between the load and switch and by optimizing the performance of individual transistors with respect to mobility, gate leakage, etc... In conclusion, we have demonstrated an easy and reproducible way to switch OTFTs from enhancement to depletion mode by a photochemical reaction using photoacid generators as interfacial layers and demonstrated that this allows the fabrication of good quality depletion-load inverters with tunable characteristics... The first 5 nm were evaporated at a rate of 0.02 A s and the subsequent 30 nm at a rate of 0.1A s. 50-nm-thick Au source and drain electrodes were deposited through a shadow mask at a base pressure of 4 × 10 mbar... The resulting channel length and width were 50 μm and 7 mm, respectively... In this context it needs to be mentioned that in another series of experiments it was found that when illuminating PBHND prior to pentacene deposition and subsequently exposing the devices to air before growing the semiconductor, the observed VTh shifts were comparably small but the growth of the pentacene could be reproducibly tuned by the illumination time.

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Top: Inverter characteristics with differently illuminated load TFTs (illuminated for 0, 1, 2, 3, 4, and 5 s); the arrow shows the trend for increasing illumination times. Bottom: the corresponding gains of the inverters; inset: wiring diagram of a depletion-load inverter.
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fig03: Top: Inverter characteristics with differently illuminated load TFTs (illuminated for 0, 1, 2, 3, 4, and 5 s); the arrow shows the trend for increasing illumination times. Bottom: the corresponding gains of the inverters; inset: wiring diagram of a depletion-load inverter.

Mentions: This provides us with all the tools necessary to perform the next step in the direction of integrated p-type organic electronic devices, which is the fabrication of a (tuneable) depletion-load inverter. The wiring diagram of such an inverter is plotted as an inset in Figure 3. The switch transistor is realized by a non-illuminated PBHND-containing device that has a negative threshold voltage of around VTh = –10 V. The load transistor (also a device containing a PBHND interfacial layer) was illuminated in steps of 1 s in an argon glove box after the inverter wiring was realized. As seen in Figure 3, the inverter characteristic is very poor prior to illumination, the gain of the inverter is negligible, and the achievable output voltage at the low level is only −4 V. This is because the non-illuminated load transistor is normally off and works in enhancement mode. By increasing the illumination time of the load transistor and shifting its threshold towards the positive voltage regime, the inverter characteristic improves significantly. The turn-on voltage of the inverter is shifted to more negative values and the gain of the inverter increases. After illuminating the load transistor for 3 s, an optimum value of VTh,load with respect to the threshold voltage of the switch-transistor is reached, resulting in a steep inverter transition with a maximum gain of about 40 (see bottom graph in Figure 3). Further increasing the illumination time results in a deterioration of the inverter performance. At this point it should be noted that no attempts for optimizing the inverter characteristics other than tuning VTh,load were made. Therefore, further significant improvements can be expected by adapting the width-to-length ratio of the channel between the load and switch and by optimizing the performance of individual transistors with respect to mobility, gate leakage, etc.


Tuning the threshold voltage in organic thin-film transistors by local channel doping using photoreactive interfacial layers.

Marchl M, Edler M, Haase A, Fian A, Trimmel G, Griesser T, Stadlober B, Zojer E - Adv. Mater. Weinheim (2010)

Top: Inverter characteristics with differently illuminated load TFTs (illuminated for 0, 1, 2, 3, 4, and 5 s); the arrow shows the trend for increasing illumination times. Bottom: the corresponding gains of the inverters; inset: wiring diagram of a depletion-load inverter.
© Copyright Policy - open-access
Related In: Results  -  Collection

License
Show All Figures
getmorefigures.php?uid=PMC3021719&req=5

fig03: Top: Inverter characteristics with differently illuminated load TFTs (illuminated for 0, 1, 2, 3, 4, and 5 s); the arrow shows the trend for increasing illumination times. Bottom: the corresponding gains of the inverters; inset: wiring diagram of a depletion-load inverter.
Mentions: This provides us with all the tools necessary to perform the next step in the direction of integrated p-type organic electronic devices, which is the fabrication of a (tuneable) depletion-load inverter. The wiring diagram of such an inverter is plotted as an inset in Figure 3. The switch transistor is realized by a non-illuminated PBHND-containing device that has a negative threshold voltage of around VTh = –10 V. The load transistor (also a device containing a PBHND interfacial layer) was illuminated in steps of 1 s in an argon glove box after the inverter wiring was realized. As seen in Figure 3, the inverter characteristic is very poor prior to illumination, the gain of the inverter is negligible, and the achievable output voltage at the low level is only −4 V. This is because the non-illuminated load transistor is normally off and works in enhancement mode. By increasing the illumination time of the load transistor and shifting its threshold towards the positive voltage regime, the inverter characteristic improves significantly. The turn-on voltage of the inverter is shifted to more negative values and the gain of the inverter increases. After illuminating the load transistor for 3 s, an optimum value of VTh,load with respect to the threshold voltage of the switch-transistor is reached, resulting in a steep inverter transition with a maximum gain of about 40 (see bottom graph in Figure 3). Further increasing the illumination time results in a deterioration of the inverter performance. At this point it should be noted that no attempts for optimizing the inverter characteristics other than tuning VTh,load were made. Therefore, further significant improvements can be expected by adapting the width-to-length ratio of the channel between the load and switch and by optimizing the performance of individual transistors with respect to mobility, gate leakage, etc.

View Article: PubMed Central - PubMed

Affiliation: Institute of Solid State Physics, Graz University of Technology, Petersgasse 16, 8010 Graz, Austria.

AUTOMATICALLY GENERATED EXCERPT
Please rate it.

Two of the most crucial device parameters are the charge carrier mobility and the threshold voltage (VTh)... Moreover, the VTh shifts for PHDBD interfacial layers are not stable for repeated measurement cycles, as shown in the right plot in Figure 2... For the PBHND-based OTFTs, even after more than 200 measurements the threshold voltage did not shift back considerably... They include an increase of the off current, a larger hysteresis, and a deterioration of the drain current at large negative gate bias... A detailed discussion can be found in the Supporting Information... The PHBND measurements were reproduced for two batches of freshly synthesized polymer and for various samples within one batch... To verify that the observed effects are indeed a consequence of interfacial acid doping, two test experiments were performed... The switch transistor is realized by a non-illuminated PBHND-containing device that has a negative threshold voltage of around VTh = –10 V... The load transistor (also a device containing a PBHND interfacial layer) was illuminated in steps of 1 s in an argon glove box after the inverter wiring was realized... After illuminating the load transistor for 3 s, an optimum value of VTh,load with respect to the threshold voltage of the switch-transistor is reached, resulting in a steep inverter transition with a maximum gain of about 40 (see bottom graph in Figure 3)... Therefore, further significant improvements can be expected by adapting the width-to-length ratio of the channel between the load and switch and by optimizing the performance of individual transistors with respect to mobility, gate leakage, etc... In conclusion, we have demonstrated an easy and reproducible way to switch OTFTs from enhancement to depletion mode by a photochemical reaction using photoacid generators as interfacial layers and demonstrated that this allows the fabrication of good quality depletion-load inverters with tunable characteristics... The first 5 nm were evaporated at a rate of 0.02 A s and the subsequent 30 nm at a rate of 0.1A s. 50-nm-thick Au source and drain electrodes were deposited through a shadow mask at a base pressure of 4 × 10 mbar... The resulting channel length and width were 50 μm and 7 mm, respectively... In this context it needs to be mentioned that in another series of experiments it was found that when illuminating PBHND prior to pentacene deposition and subsequently exposing the devices to air before growing the semiconductor, the observed VTh shifts were comparably small but the growth of the pentacene could be reproducibly tuned by the illumination time.

Show MeSH