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Record Endurance for Single-Walled Carbon Nanotube-Based Memory Cell.

Di Bartolomeo A, Yang Y, Rinzan MB, Boyd AK, Barbara P - Nanoscale Res Lett (2010)

Bottom Line: We study memory devices consisting of single-walled carbon nanotube transistors with charge storage at the SiO(2)/nanotube interface.We show that this type of memory device is robust, withstanding over 10(5) operating cycles, with a current drive capability up to 10(-6) A at 20 mV drain bias, thus competing with state-of-the-art Si-devices.We find that the device performance depends on temperature and pressure, while both endurance and data retention are improved in vacuum.

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ABSTRACT
We study memory devices consisting of single-walled carbon nanotube transistors with charge storage at the SiO(2)/nanotube interface. We show that this type of memory device is robust, withstanding over 10(5) operating cycles, with a current drive capability up to 10(-6) A at 20 mV drain bias, thus competing with state-of-the-art Si-devices. We find that the device performance depends on temperature and pressure, while both endurance and data retention are improved in vacuum.

No MeSH data available.


a Endurance tests performed on the same SWCNT memory device as in Fig. 2, at 290 K in air. Switching with ± 20 V and 0.25 s pulses, reading at VGS = 0 V. b Endurance test of another SWCNT memory device at room conditions with ± 20 V and 0.25-s switching pulses and reading at VGS = 0 V
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Figure 3: a Endurance tests performed on the same SWCNT memory device as in Fig. 2, at 290 K in air. Switching with ± 20 V and 0.25 s pulses, reading at VGS = 0 V. b Endurance test of another SWCNT memory device at room conditions with ± 20 V and 0.25-s switching pulses and reading at VGS = 0 V

Mentions: The retention times of both the ON and OFF states are tested by continuously recording the drain current in the ON (OFF) state at different temperatures and pressures. The results in Fig. 3d show that after a rapid increase in the OFF-state current during the first hour, the ON and OFF states remain well separated and the retention time exceeds 8–10 h in ambient air and under vacuum at both room temperature and 77 K. At low temperature, the current increase is slower and the separation of the ON/OFF currents is larger.


Record Endurance for Single-Walled Carbon Nanotube-Based Memory Cell.

Di Bartolomeo A, Yang Y, Rinzan MB, Boyd AK, Barbara P - Nanoscale Res Lett (2010)

a Endurance tests performed on the same SWCNT memory device as in Fig. 2, at 290 K in air. Switching with ± 20 V and 0.25 s pulses, reading at VGS = 0 V. b Endurance test of another SWCNT memory device at room conditions with ± 20 V and 0.25-s switching pulses and reading at VGS = 0 V
© Copyright Policy
Related In: Results  -  Collection

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getmorefigures.php?uid=PMC2964474&req=5

Figure 3: a Endurance tests performed on the same SWCNT memory device as in Fig. 2, at 290 K in air. Switching with ± 20 V and 0.25 s pulses, reading at VGS = 0 V. b Endurance test of another SWCNT memory device at room conditions with ± 20 V and 0.25-s switching pulses and reading at VGS = 0 V
Mentions: The retention times of both the ON and OFF states are tested by continuously recording the drain current in the ON (OFF) state at different temperatures and pressures. The results in Fig. 3d show that after a rapid increase in the OFF-state current during the first hour, the ON and OFF states remain well separated and the retention time exceeds 8–10 h in ambient air and under vacuum at both room temperature and 77 K. At low temperature, the current increase is slower and the separation of the ON/OFF currents is larger.

Bottom Line: We study memory devices consisting of single-walled carbon nanotube transistors with charge storage at the SiO(2)/nanotube interface.We show that this type of memory device is robust, withstanding over 10(5) operating cycles, with a current drive capability up to 10(-6) A at 20 mV drain bias, thus competing with state-of-the-art Si-devices.We find that the device performance depends on temperature and pressure, while both endurance and data retention are improved in vacuum.

View Article: PubMed Central - HTML - PubMed

ABSTRACT
We study memory devices consisting of single-walled carbon nanotube transistors with charge storage at the SiO(2)/nanotube interface. We show that this type of memory device is robust, withstanding over 10(5) operating cycles, with a current drive capability up to 10(-6) A at 20 mV drain bias, thus competing with state-of-the-art Si-devices. We find that the device performance depends on temperature and pressure, while both endurance and data retention are improved in vacuum.

No MeSH data available.